99 lines
2.9 KiB
TeX
99 lines
2.9 KiB
TeX
\documentclass{article}
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\usepackage{graphicx}
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\usepackage{setspace}
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\usepackage{listings}
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\usepackage{color}
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\usepackage{circuitikz}
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\usepackage{float}
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\definecolor{dkgreen}{rgb}{0,0.6,0}
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\definecolor{gray}{rgb}{0.5,0.5,0.5}
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\definecolor{mauve}{rgb}{0.58,0,0.82}
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\lstset{basicstyle=\small,
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keywordstyle=\color{mauve},
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identifierstyle=\color{dkgreen},
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stringstyle=\color{gray},
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numbers=left
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}
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\title{ECE 456 - Problem Set 1}
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\date{2021-02-06}
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\author{David Lenfesty \\ lenfesty@ualberta.ca
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\and Phillip Kirwin \\ pkirwin@ualberta.ca}
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\setcounter{tocdepth}{2} % Show subsections
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\begin{document}
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\doublespacing
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\pagenumbering{gobble}
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\maketitle
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\newpage
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\singlespacing
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\pagenumbering{arabic}
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\section{Introduction}
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The purpose of this lab was to design control circuits according to the provided
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specifications, and then verify their operation using a simulation or an FPGA.
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In the first part of the lab, a series of boolean expressions
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were designed to implement a Multiplexer/Demultiplexer circuit,
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intended to route data from one of three radio recievers to one
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of three engineers, and signal which engineer was currently
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recieving data.
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First, Xilinx Vivado Software was used to produce a circuit
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to fulfill this objective. Then, using the same software,
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the circuit was simulated against input combinations which
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would be encountered during normal use, for verification.
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For the second part of the lab, an Access Control circuit was to be designed,
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allowing lab entry only if a valid ID was provided alongside a proper keypad
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combination. Otherwise, an alarm signal was to be sent out.
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The method of designing this circuit was very similar to the method in part one:
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Again using Xilinx Vivado, the circuit was designed and simulated against inputs
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to verify if the outputs matched those in the specification.
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However, for this section, the design was also uploaded to a physical FPGA board
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where various could be manually tested and validated.
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\section{Design Section}
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In order to design the desired systems, the Xilinx Vivado software was
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used to write VHDL code that described the operation of each circuit.
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\newpage
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\paragraph{MUX / DEMUX Circuit}
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To implement the multiplexing/demultiplexing system, the following circuit had to be written in VHDL.
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The VHDL architecture below was written to implement this circuit in hardware.
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\begin{lstlisting}[language=MATLAB]
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U0 = 0.25;
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kBT = 0.025;
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mu = 0;
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cal_E = 0.2;
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% Capacitance parameters
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alpha_G = 0.5;
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alpha_D = 0.5;
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alpha_S = 1 - alpha_G - alpha_D;
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% Energy grid in eV, from -1 eV to 1 eV
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NE = 501;
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E = linspace(-1,1,NE);
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dE = E(2) - E(1);
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% Gamma parameters, in eV
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gamma_1 = 0.005;
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gamma_2 = 0.005;
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gamma = gamma_1 + gamma_2;
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\end{lstlisting}
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\newpage
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\end{document} |