Started Lab 2 report
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parent
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0
.gitignore
vendored
Normal file → Executable file
0
.gitignore
vendored
Normal file → Executable file
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CMakeLists.txt
Normal file → Executable file
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CMakeLists.txt
Normal file → Executable file
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final_project/main.c
Normal file → Executable file
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final_project/main.c
Normal file → Executable file
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generic-gcc-avr.cmake
Normal file → Executable file
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generic-gcc-avr.cmake
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##################################################################################
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# "THE ANY BEVERAGE-WARE LICENSE" (Revision 42 - based on beer-ware
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# license):
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# <dev@layer128.net> wrote this file. As long as you retain this notice
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# you can do whatever you want with this stuff. If we meet some day, and
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# you think this stuff is worth it, you can buy me a be(ve)er(age) in
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# return. (I don't like beer much.)
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#
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# Matthias Kleemann
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##################################################################################
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##################################################################################
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# Sample CMakeLists.txt for a simple AVR project based on the toolchain
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##################################################################################
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cmake_minimum_required(VERSION 2.8)
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### TOOLCHAIN SETUP AREA #################################################
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# Set any variables used in the toolchain prior project() call. In that
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# case they are already set and used.
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##########################################################################
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##################################################################################
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# tools to be used for programming the AVR
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##################################################################################
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set(AVR_UPLOADTOOL avrdude)
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set(AVR_PROGRAMMER avrispmkII)
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set(AVR_UPLOADTOOL_PORT usb)
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# AVR and fuses needs to be set
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set(AVR_MCU attiny13a)
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set(AVR_H_FUSE 0xFF)
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set(AVR_L_FUSE 0x6A)
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### END TOOLCHAIN SETUP AREA #############################################
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##########################################################################
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# name your project
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##########################################################################
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project(lab1)
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##################################################################################
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# status messages
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##################################################################################
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message(STATUS "Current uploadtool is: ${AVR_UPLOADTOOL}")
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message(STATUS "Current programmer is: ${AVR_PROGRAMMER}")
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message(STATUS "Current upload port is: ${AVR_UPLOADTOOL_PORT}")
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message(STATUS "Current uploadtool options are: ${AVR_UPLOADTOOL_OPTIONS}")
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message(STATUS "Current MCU is set to: ${AVR_MCU}")
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message(STATUS "Current H_FUSE is set to: ${AVR_H_FUSE}")
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message(STATUS "Current L_FUSE is set to: ${AVR_L_FUSE}")
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##################################################################################
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# set build type, if not already set at cmake command line
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##################################################################################
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if(NOT CMAKE_BUILD_TYPE)
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set(CMAKE_BUILD_TYPE Release)
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endif(NOT CMAKE_BUILD_TYPE)
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##################################################################################
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# needs to be defined for AVR toolchain
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##################################################################################
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set(MCU_SPEED "9600000UL")
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##################################################################################
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# some cmake cross-compile necessities
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##################################################################################
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if(DEFINED ENV{AVR_FIND_ROOT_PATH})
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set(CMAKE_FIND_ROOT_PATH $ENV{AVR_FIND_ROOT_PATH})
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else(DEFINED ENV{AVR_FIND_ROOT_PATH})
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if(EXISTS "/opt/local/avr")
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set(CMAKE_FIND_ROOT_PATH "/opt/local/avr")
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elseif(EXISTS "/usr/avr")
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set(CMAKE_FIND_ROOT_PATH "/usr/avr")
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elseif(EXISTS "/usr/lib/avr")
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set(CMAKE_FIND_ROOT_PATH "/usr/lib/avr")
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elseif(EXISTS "/usr/local/CrossPack-AVR")
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set(CMAKE_FIND_ROOT_PATH "/usr/local/CrossPack-AVR")
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else(EXISTS "/opt/local/avr")
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message(FATAL_ERROR "Please set AVR_FIND_ROOT_PATH in your environment.")
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endif(EXISTS "/opt/local/avr")
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endif(DEFINED ENV{AVR_FIND_ROOT_PATH})
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set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
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set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
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set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
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# not added automatically, since CMAKE_SYSTEM_NAME is "generic"
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set(CMAKE_SYSTEM_INCLUDE_PATH "${CMAKE_FIND_ROOT_PATH}/include")
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set(CMAKE_SYSTEM_LIBRARY_PATH "${CMAKE_FIND_ROOT_PATH}/lib")
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##################################################################################
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# status messages for generating
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##################################################################################
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message(STATUS "Set CMAKE_FIND_ROOT_PATH to ${CMAKE_FIND_ROOT_PATH}")
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message(STATUS "Set CMAKE_SYSTEM_INCLUDE_PATH to ${CMAKE_SYSTEM_INCLUDE_PATH}")
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message(STATUS "Set CMAKE_SYSTEM_LIBRARY_PATH to ${CMAKE_SYSTEM_LIBRARY_PATH}")
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##################################################################################
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# set compiler options for build types
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##################################################################################
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if(CMAKE_BUILD_TYPE MATCHES Release)
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set(CMAKE_C_FLAGS_RELEASE "-Os")
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set(CMAKE_CXX_FLAGS_RELEASE "-Os")
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endif(CMAKE_BUILD_TYPE MATCHES Release)
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if(CMAKE_BUILD_TYPE MATCHES RelWithDebInfo)
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set(CMAKE_C_FLAGS_RELWITHDEBINFO "-Os -save-temps -g -gdwarf-3 -gstrict-dwarf")
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set(CMAKE_CXX_FLAGS_RELWITHDEBINFO "-Os -save-temps -g -gdwarf-3 -gstrict-dwarf")
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endif(CMAKE_BUILD_TYPE MATCHES RelWithDebInfo)
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if(CMAKE_BUILD_TYPE MATCHES Debug)
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set(CMAKE_C_FLAGS_DEBUG "-O0 -save-temps -g -gdwarf-3 -gstrict-dwarf")
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set(CMAKE_CXX_FLAGS_DEBUG "-O0 -save-temps -g -gdwarf-3 -gstrict-dwarf")
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endif(CMAKE_BUILD_TYPE MATCHES Debug)
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##################################################################################
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# compiler options for all build types
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##################################################################################
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add_definitions("-DF_CPU=${MCU_SPEED}")
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add_definitions("-fpack-struct")
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add_definitions("-fshort-enums")
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add_definitions("-Wall")
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add_definitions("-Werror")
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# http://gcc.gnu.org/onlinedocs/gcc-4.8.2/gcc/Alternate-Keywords.html#Alternate-Keywords
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# [...]-pedantic and other options cause warnings for many GNU C extensions. You can prevent such warnings within
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# one expression by writing __extension__ before the expression. __extension__ has no effect aside from this.[...]
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add_definitions("-pedantic")
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add_definitions("-pedantic-errors")
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add_definitions("-funsigned-char")
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add_definitions("-funsigned-bitfields")
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add_definitions("-ffunction-sections")
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add_definitions("-c")
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add_definitions("-std=gnu99")
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##################################################################################
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# add AVR executable
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##################################################################################
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add_avr_executable(
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main
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main.c
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)
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##################################################################################
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# add AVR library
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##################################################################################
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# add_avr_library(
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# <library-name>
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# <sources> <headers>
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# )
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##################################################################################
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# link library to executable
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# NOTE: It needs to be the elf target.
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##################################################################################
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# target_link_libraries(<executable-name>-${AVR_MCU}.elf <library-name>-${AVR_MCU})
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# OR easier
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#target_link_libraries(<executable-name> <library-name> <some-external-libary>)
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58
lab_1/Empty LaTex ReportV1.tex
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58
lab_1/Empty LaTex ReportV1.tex
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\documentclass[12pt]{article}
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\usepackage{comment}
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\newcommand{\firstName}{FirstName}
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\newcommand{\lastName}{LastName}
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\newcommand{\docTitle}{My Document}
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\newcommand{\email}{email@example.ca}
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\newcommand{\userID}{123456789}
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\newcommand{\courseNum}{COURSE 101}
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\newcommand{\labName}{Lab 0}
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\newcommand{\labSection}{D00}
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\usepackage{pdfpages}
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\usepackage[hidelinks]{hyperref}
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\hypersetup{
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pdftitle={\docTitle{}},
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pdfauthor={\firstName{} \lastName{}},
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bookmarksnumbered=true,
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bookmarksopen=true,
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bookmarksopenlevel=1,
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colorlinks=false,
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pdfstartview=Fit,
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pdfpagemode=UseOutlines, % this is the option you were lookin for
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pdfpagelayout=TwoPageRight
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}
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\title{ {\Huge \docTitle{}} \\
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\courseNum{} - \labName{} - \labSection{}}
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\author{
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\firstName{} \lastName{}\\
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\texttt{\email{}}\\
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\texttt{ID: \userID{}}
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}
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\begin{document}
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\pagenumbering{roman}
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\maketitle
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\newpage
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\tableofcontents
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\newpage
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\pagenumbering{arabic}
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\section{Section}
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\subsection{Subsection}
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\subsubsection{Subsubsection}
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\begin{comment}
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Use this to attach a pdf, such as a marking sheet
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\includepdf[pages=-,pagecommand={}]{./YourPDFHere.pdf}
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\end{comment}
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\end{document}
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37
lab_1/answers.md
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37
lab_1/answers.md
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# Question 1:
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Defining a macro to hold a constant value essentially tells the compiler
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to fill in that value where it is placed before actually compiling,
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while declaring a constant variable creates a value in memory that holds the variable.
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The advantage of a macro is that it is smaller, and can take up less code space if used
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in certain contexts, and puts some of the work into the preprocessor instead of
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the microcontroller. However, macros can sometimes be confusing to work with, as the
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compiler errors can be less useful, and you can occasionally have to follow long chains of
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definitions. Constant variables are also able to be referenced via pointers which can be
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necessary in a context that needs pointers.
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# Question 2:
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F_CPU is a deginition that affects the math used for the delay functions
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(_delay_ms() and _delay_us()). Changing this macro does not change the clock frequency,
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as that has to be changed (in the case of the Attiny13A) by setting the the various
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clock-related fuse bits, like CLKDIV8, and the CLKSEL bits.
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# Question 3:
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DDRx is the genericised name for the collection of Data Direction Registers
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(DDRA, DDRB, etc.). By setting individual bits in these registers, you change whether the
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correlating pin is an input or an ouptut (0 or 1, respectively).
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PORTx is similar, it effects the values of these pins. When DDRB has the relevent pin set
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as an output, the value of the same bit is set as the output (0 is low, 1 is high). If it
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is set as an input, the bit in PORTB determines if the integrated pullup resistor is
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connected. (1 means it's connected, 0 means it is not, and the pin is left floating)
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It is typically better to use bitwise operates to set individual bits, rather than setting
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all of the bits at once so that you don't have to keep track of what each pin should be.
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By using the bitwise operators, you can keep the state of the pins that are not immediately
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relevant with no decision overhead from the programmer (i.e. you would not have to keep
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track of the other pins state, you just need to care about the single pin).
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3
lab_1/lab1_schematic/312.dcm
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3
lab_1/lab1_schematic/312.dcm
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EESchema-DOCLIB Version 2.0
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#
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#End Doc Library
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88
lab_1/lab1_schematic/312.lib
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lab_1/lab1_schematic/312.lib
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EESchema-LIBRARY Version 2.4
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#encoding utf-8
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#
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# ADISCOVERY
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#
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DEF ADISCOVERY P 0 40 Y Y 1 F N
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F0 "P" 300 -100 50 H V C CNN
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F1 "ADISCOVERY" 250 2350 50 H V C CNN
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F2 "" 0 2100 50 H I C CNN
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F3 "" 0 2100 50 H I C CNN
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DRAW
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S 0 2300 550 0 0 1 0 N
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X CH1- 1 -100 2150 100 R 50 50 1 1 I
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X W1 10 650 1200 100 L 50 50 1 1 O
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X GND 11 650 150 100 L 50 50 1 1 w
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X GND 12 650 50 100 L 50 50 1 1 w
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X T2 13 -100 1700 100 R 50 50 1 1 I
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X T1 14 -100 1800 100 R 50 50 1 1 I
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X D8 15 -100 750 100 R 50 50 1 1 I
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X D0 16 -100 1550 100 R 50 50 1 1 I
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X D9 17 -100 650 100 R 50 50 1 1 I
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X D1 18 -100 1450 100 R 50 50 1 1 I
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X D10 19 -100 550 100 R 50 50 1 1 I
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X CH1+ 2 -100 2250 100 R 50 50 1 1 I
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X D2 20 -100 1350 100 R 50 50 1 1 I
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X D11 21 -100 450 100 R 50 50 1 1 I
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X D3 22 -100 1250 100 R 50 50 1 1 I
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X D12 23 -100 350 100 R 50 50 1 1 I
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X D4 24 -100 1150 100 R 50 50 1 1 I
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X D13 25 -100 250 100 R 50 50 1 1 I
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X D5 26 -100 1050 100 R 50 50 1 1 I
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X D14 27 -100 150 100 R 50 50 1 1 I
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X D6 28 -100 950 100 R 50 50 1 1 I
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X D15 29 -100 50 100 R 50 50 1 1 I
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X CH2- 3 -100 1950 100 R 50 50 1 1 I
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X D7 30 -100 850 100 R 50 50 1 1 I
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X CH2+ 4 -100 2050 100 R 50 50 1 1 I
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X GND 5 650 350 100 L 50 50 1 1 w
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X GND 6 650 250 100 L 50 50 1 1 w
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X V- 7 650 2150 100 L 50 50 1 1 w
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X V+ 8 650 2250 100 L 50 50 1 1 w
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X W2 9 650 1300 100 L 50 50 1 1 O
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ENDDRAW
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ENDDEF
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#
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# ATTINY13A
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#
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DEF ATTINY13A U 0 40 Y Y 1 F N
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F0 "U" 250 -100 50 H V C CNN
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F1 "ATTINY13A" 250 700 50 H V C CNN
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F2 "" 250 450 50 H I C CNN
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F3 "" 250 450 50 H I C CNN
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DRAW
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S 0 600 450 0 0 1 0 N
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X PB5 1 550 550 100 L 50 50 1 1 B
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X PB3 2 550 350 100 L 50 50 1 1 B
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X PB4 3 550 450 100 L 50 50 1 1 B
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X GND 4 -100 50 100 R 50 50 1 1 W
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X PB0 5 550 50 100 L 50 50 1 1 B
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X PB1 6 550 150 100 L 50 50 1 1 B
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X PB2 7 550 250 100 L 50 50 1 1 B
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||||
X VCC 8 -100 550 100 R 50 50 1 1 W
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ENDDRAW
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||||
ENDDEF
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||||
#
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||||
# ICE_SPI
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#
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||||
DEF ICE_SPI P 0 40 Y Y 1 F N
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||||
F0 "P" 100 -50 50 H V C CNN
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||||
F1 "ICE_SPI" 150 1050 50 H V C CNN
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||||
F2 "" 350 600 50 H I C CNN
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||||
F3 "" 350 600 50 H I C CNN
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||||
DRAW
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||||
S 300 0 0 1000 0 1 0 N
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||||
X TCK 1 400 950 100 L 50 50 1 1 B
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||||
X GND 10 400 50 100 L 50 50 1 1 W
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||||
X GND 2 400 850 100 L 50 50 1 1 W
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X TDO 3 400 750 100 L 50 50 1 1 B
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||||
X VTG 4 400 650 100 L 50 50 1 1 W
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||||
X TMS 5 400 550 100 L 50 50 1 1 B
|
||||
X nSRST 6 400 450 100 L 50 50 1 1 B
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||||
X NC 7 400 350 100 L 50 50 1 1 N
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||||
X nTRST 8 400 250 100 L 50 50 1 1 B
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||||
X TDI 9 400 150 100 L 50 50 1 1 B
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||||
ENDDRAW
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||||
ENDDEF
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||||
#
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||||
#End Library
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115
lab_1/lab1_schematic/lab1_schematic-cache.lib
Normal file
115
lab_1/lab1_schematic/lab1_schematic-cache.lib
Normal file
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EESchema-LIBRARY Version 2.4
|
||||
#encoding utf-8
|
||||
#
|
||||
# 312_ADISCOVERY
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#
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||||
DEF 312_ADISCOVERY P 0 40 Y Y 1 F N
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||||
F0 "P" 300 -100 50 H V C CNN
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||||
F1 "312_ADISCOVERY" 250 2350 50 H V C CNN
|
||||
F2 "" 0 2100 50 H I C CNN
|
||||
F3 "" 0 2100 50 H I C CNN
|
||||
DRAW
|
||||
S 0 2300 550 0 0 1 0 N
|
||||
X CH1- 1 -100 2150 100 R 50 50 1 1 I
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||||
X W1 10 650 1200 100 L 50 50 1 1 O
|
||||
X GND 11 650 150 100 L 50 50 1 1 w
|
||||
X GND 12 650 50 100 L 50 50 1 1 w
|
||||
X T2 13 -100 1700 100 R 50 50 1 1 I
|
||||
X T1 14 -100 1800 100 R 50 50 1 1 I
|
||||
X D8 15 -100 750 100 R 50 50 1 1 I
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||||
X D0 16 -100 1550 100 R 50 50 1 1 I
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||||
X D9 17 -100 650 100 R 50 50 1 1 I
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||||
X D1 18 -100 1450 100 R 50 50 1 1 I
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||||
X D10 19 -100 550 100 R 50 50 1 1 I
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||||
X CH1+ 2 -100 2250 100 R 50 50 1 1 I
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||||
X D2 20 -100 1350 100 R 50 50 1 1 I
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||||
X D11 21 -100 450 100 R 50 50 1 1 I
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||||
X D3 22 -100 1250 100 R 50 50 1 1 I
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||||
X D12 23 -100 350 100 R 50 50 1 1 I
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||||
X D4 24 -100 1150 100 R 50 50 1 1 I
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||||
X D13 25 -100 250 100 R 50 50 1 1 I
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||||
X D5 26 -100 1050 100 R 50 50 1 1 I
|
||||
X D14 27 -100 150 100 R 50 50 1 1 I
|
||||
X D6 28 -100 950 100 R 50 50 1 1 I
|
||||
X D15 29 -100 50 100 R 50 50 1 1 I
|
||||
X CH2- 3 -100 1950 100 R 50 50 1 1 I
|
||||
X D7 30 -100 850 100 R 50 50 1 1 I
|
||||
X CH2+ 4 -100 2050 100 R 50 50 1 1 I
|
||||
X GND 5 650 350 100 L 50 50 1 1 w
|
||||
X GND 6 650 250 100 L 50 50 1 1 w
|
||||
X V- 7 650 2150 100 L 50 50 1 1 w
|
||||
X V+ 8 650 2250 100 L 50 50 1 1 w
|
||||
X W2 9 650 1300 100 L 50 50 1 1 O
|
||||
ENDDRAW
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||||
ENDDEF
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||||
#
|
||||
# 312_ATTINY13A
|
||||
#
|
||||
DEF 312_ATTINY13A U 0 40 Y Y 1 F N
|
||||
F0 "U" 250 -100 50 H V C CNN
|
||||
F1 "312_ATTINY13A" 250 700 50 H V C CNN
|
||||
F2 "" 250 450 50 H I C CNN
|
||||
F3 "" 250 450 50 H I C CNN
|
||||
DRAW
|
||||
S 0 600 450 0 0 1 0 N
|
||||
X PB5 1 550 550 100 L 50 50 1 1 B
|
||||
X PB3 2 550 350 100 L 50 50 1 1 B
|
||||
X PB4 3 550 450 100 L 50 50 1 1 B
|
||||
X GND 4 -100 50 100 R 50 50 1 1 W
|
||||
X PB0 5 550 50 100 L 50 50 1 1 B
|
||||
X PB1 6 550 150 100 L 50 50 1 1 B
|
||||
X PB2 7 550 250 100 L 50 50 1 1 B
|
||||
X VCC 8 -100 550 100 R 50 50 1 1 W
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# 312_ICE_SPI
|
||||
#
|
||||
DEF 312_ICE_SPI P 0 40 Y Y 1 F N
|
||||
F0 "P" 100 -50 50 H V C CNN
|
||||
F1 "312_ICE_SPI" 150 1050 50 H V C CNN
|
||||
F2 "" 350 600 50 H I C CNN
|
||||
F3 "" 350 600 50 H I C CNN
|
||||
DRAW
|
||||
S 300 0 0 1000 0 1 0 N
|
||||
X TCK 1 400 950 100 L 50 50 1 1 B
|
||||
X GND 10 400 50 100 L 50 50 1 1 W
|
||||
X GND 2 400 850 100 L 50 50 1 1 W
|
||||
X TDO 3 400 750 100 L 50 50 1 1 B
|
||||
X VTG 4 400 650 100 L 50 50 1 1 W
|
||||
X TMS 5 400 550 100 L 50 50 1 1 B
|
||||
X nSRST 6 400 450 100 L 50 50 1 1 B
|
||||
X NC 7 400 350 100 L 50 50 1 1 N
|
||||
X nTRST 8 400 250 100 L 50 50 1 1 B
|
||||
X TDI 9 400 150 100 L 50 50 1 1 B
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_GND
|
||||
#
|
||||
DEF power_GND #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -250 50 H I C CNN
|
||||
F1 "power_GND" 0 -150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
|
||||
X GND 1 0 0 0 D 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_VCC
|
||||
#
|
||||
DEF power_VCC #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_VCC" 0 150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
C 0 75 25 0 1 0 N
|
||||
P 2 0 1 0 0 0 0 50 N
|
||||
X VCC 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
1
lab_1/lab1_schematic/lab1_schematic.kicad_pcb
Normal file
1
lab_1/lab1_schematic/lab1_schematic.kicad_pcb
Normal file
@ -0,0 +1 @@
|
||||
(kicad_pcb (version 4) (host kicad "dummy file") )
|
BIN
lab_1/lab1_schematic/lab1_schematic.pdf
Normal file
BIN
lab_1/lab1_schematic/lab1_schematic.pdf
Normal file
Binary file not shown.
43
lab_1/lab1_schematic/lab1_schematic.pro
Normal file
43
lab_1/lab1_schematic/lab1_schematic.pro
Normal file
@ -0,0 +1,43 @@
|
||||
update=Mon 07 Oct 2019 10:18:21 AM MDT
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[pcbnew]
|
||||
version=1
|
||||
LastNetListRead=
|
||||
UseCmpFile=1
|
||||
PadDrill=0.600000000000
|
||||
PadDrillOvalY=0.600000000000
|
||||
PadSizeH=1.500000000000
|
||||
PadSizeV=1.500000000000
|
||||
PcbTextSizeV=1.500000000000
|
||||
PcbTextSizeH=1.500000000000
|
||||
PcbTextThickness=0.300000000000
|
||||
ModuleTextSizeV=1.000000000000
|
||||
ModuleTextSizeH=1.000000000000
|
||||
ModuleTextSizeThickness=0.150000000000
|
||||
SolderMaskClearance=0.000000000000
|
||||
SolderMaskMinWidth=0.000000000000
|
||||
DrawSegmentWidth=0.200000000000
|
||||
BoardOutlineThickness=0.100000000000
|
||||
ModuleOutlineThickness=0.150000000000
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[schematic_editor]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
PlotDirectoryName=
|
||||
SubpartIdSeparator=0
|
||||
SubpartFirstId=65
|
||||
NetFmtName=
|
||||
SpiceAjustPassiveValues=0
|
||||
LabSize=50
|
||||
ERC_TestSimilarLabels=1
|
221
lab_1/lab1_schematic/lab1_schematic.sch
Normal file
221
lab_1/lab1_schematic/lab1_schematic.sch
Normal file
@ -0,0 +1,221 @@
|
||||
EESchema Schematic File Version 4
|
||||
EELAYER 30 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 1
|
||||
Title ""
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp ""
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
$Comp
|
||||
L 312:ATTINY13A U?
|
||||
U 1 1 5D9B7CC8
|
||||
P 5150 3100
|
||||
F 0 "U?" H 5375 3875 50 0000 C CNN
|
||||
F 1 "ATTINY13A" H 5375 3784 50 0000 C CNN
|
||||
F 2 "" H 5400 3550 50 0001 C CNN
|
||||
F 3 "" H 5400 3550 50 0001 C CNN
|
||||
1 5150 3100
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L 312:ICE_SPI P?
|
||||
U 1 1 5D9B8E3A
|
||||
P 3150 3500
|
||||
F 0 "P?" H 3358 4675 50 0000 C CNN
|
||||
F 1 "ICE_SPI" H 3358 4584 50 0000 C CNN
|
||||
F 2 "" H 3500 4100 50 0001 C CNN
|
||||
F 3 "" H 3500 4100 50 0001 C CNN
|
||||
1 3150 3500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L 312:ADISCOVERY P?
|
||||
U 1 1 5D9BBE82
|
||||
P 7250 4250
|
||||
F 0 "P?" H 7525 6725 50 0000 C CNN
|
||||
F 1 "ADISCOVERY" H 7525 6634 50 0000 C CNN
|
||||
F 2 "" H 7250 6350 50 0001 C CNN
|
||||
F 3 "" H 7250 6350 50 0001 C CNN
|
||||
1 7250 4250
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
3550 2650 4100 2650
|
||||
Wire Wire Line
|
||||
4100 2650 4100 3450
|
||||
Wire Wire Line
|
||||
3550 3450 4100 3450
|
||||
Connection ~ 4100 3450
|
||||
Wire Wire Line
|
||||
4100 3450 4100 3700
|
||||
Wire Wire Line
|
||||
3550 2850 3950 2850
|
||||
Wire Wire Line
|
||||
3950 2850 3950 2350
|
||||
Text Label 3700 2750 0 50 ~ 0
|
||||
MISO
|
||||
Wire Wire Line
|
||||
3550 2750 3700 2750
|
||||
Wire Wire Line
|
||||
3550 2550 3700 2550
|
||||
Wire Wire Line
|
||||
3550 3050 3700 3050
|
||||
Wire Wire Line
|
||||
3550 3350 3700 3350
|
||||
Text Label 3700 2550 0 50 ~ 0
|
||||
SCK
|
||||
Text Label 3700 3050 0 50 ~ 0
|
||||
~RESET
|
||||
Text Label 3700 3350 0 50 ~ 0
|
||||
MOSI
|
||||
$Comp
|
||||
L power:VCC #PWR?
|
||||
U 1 1 5D9C1403
|
||||
P 3950 2350
|
||||
F 0 "#PWR?" H 3950 2200 50 0001 C CNN
|
||||
F 1 "VCC" H 3967 2523 50 0000 C CNN
|
||||
F 2 "" H 3950 2350 50 0001 C CNN
|
||||
F 3 "" H 3950 2350 50 0001 C CNN
|
||||
1 3950 2350
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:GND #PWR?
|
||||
U 1 1 5D9C16FB
|
||||
P 4100 3700
|
||||
F 0 "#PWR?" H 4100 3450 50 0001 C CNN
|
||||
F 1 "GND" H 4105 3527 50 0000 C CNN
|
||||
F 2 "" H 4100 3700 50 0001 C CNN
|
||||
F 3 "" H 4100 3700 50 0001 C CNN
|
||||
1 4100 3700
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
5050 3050 4950 3050
|
||||
Wire Wire Line
|
||||
4950 3050 4950 3250
|
||||
$Comp
|
||||
L power:GND #PWR?
|
||||
U 1 1 5D9C1C4C
|
||||
P 4950 3250
|
||||
F 0 "#PWR?" H 4950 3000 50 0001 C CNN
|
||||
F 1 "GND" H 4955 3077 50 0000 C CNN
|
||||
F 2 "" H 4950 3250 50 0001 C CNN
|
||||
F 3 "" H 4950 3250 50 0001 C CNN
|
||||
1 4950 3250
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:VCC #PWR?
|
||||
U 1 1 5D9C1E2A
|
||||
P 4900 2350
|
||||
F 0 "#PWR?" H 4900 2200 50 0001 C CNN
|
||||
F 1 "VCC" H 4917 2523 50 0000 C CNN
|
||||
F 2 "" H 4900 2350 50 0001 C CNN
|
||||
F 3 "" H 4900 2350 50 0001 C CNN
|
||||
1 4900 2350
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
5050 2550 4900 2550
|
||||
Wire Wire Line
|
||||
4900 2550 4900 2350
|
||||
Wire Notes Line
|
||||
3050 2050 4250 2050
|
||||
Wire Notes Line
|
||||
4250 2050 4250 4050
|
||||
Wire Notes Line
|
||||
4250 4050 3050 4050
|
||||
Wire Notes Line
|
||||
3050 4050 3050 2050
|
||||
Text Notes 3100 4000 0 50 ~ 0
|
||||
Atmel ICE\nProgramming Header
|
||||
Wire Wire Line
|
||||
5700 2550 5850 2550
|
||||
Text Label 5850 2550 0 50 ~ 0
|
||||
~RESET
|
||||
Wire Wire Line
|
||||
5700 2850 5850 2850
|
||||
Text Label 5850 2850 0 50 ~ 0
|
||||
SCK
|
||||
Text Label 5850 2950 0 50 ~ 0
|
||||
MISO
|
||||
Text Label 5850 3050 0 50 ~ 0
|
||||
MOSI
|
||||
Wire Wire Line
|
||||
5700 2950 5850 2950
|
||||
Wire Wire Line
|
||||
5700 3050 5850 3050
|
||||
Text Label 6550 2000 0 50 ~ 0
|
||||
WAVEOUT
|
||||
Wire Wire Line
|
||||
7900 2000 8050 2000
|
||||
Wire Wire Line
|
||||
8050 2000 8050 1800
|
||||
$Comp
|
||||
L power:VCC #PWR?
|
||||
U 1 1 5D9C6149
|
||||
P 8050 1800
|
||||
F 0 "#PWR?" H 8050 1650 50 0001 C CNN
|
||||
F 1 "VCC" H 8067 1973 50 0000 C CNN
|
||||
F 2 "" H 8050 1800 50 0001 C CNN
|
||||
F 3 "" H 8050 1800 50 0001 C CNN
|
||||
1 8050 1800
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
7900 3900 7900 4000
|
||||
Wire Wire Line
|
||||
7900 4100 7900 4200
|
||||
Wire Wire Line
|
||||
7900 4200 7900 4350
|
||||
Connection ~ 7900 4200
|
||||
Wire Wire Line
|
||||
7900 4000 7900 4100
|
||||
Connection ~ 7900 4000
|
||||
Connection ~ 7900 4100
|
||||
$Comp
|
||||
L power:GND #PWR?
|
||||
U 1 1 5D9C7A2D
|
||||
P 7900 4350
|
||||
F 0 "#PWR?" H 7900 4100 50 0001 C CNN
|
||||
F 1 "GND" H 7905 4177 50 0000 C CNN
|
||||
F 2 "" H 7900 4350 50 0001 C CNN
|
||||
F 3 "" H 7900 4350 50 0001 C CNN
|
||||
1 7900 4350
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
6500 2000 7150 2000
|
||||
Wire Wire Line
|
||||
6500 2000 6500 2750
|
||||
Wire Wire Line
|
||||
6500 2750 5700 2750
|
||||
Wire Notes Line
|
||||
4750 2050 6150 2050
|
||||
Wire Notes Line
|
||||
6150 2050 6150 3500
|
||||
Wire Notes Line
|
||||
6150 3500 4750 3500
|
||||
Wire Notes Line
|
||||
4750 3500 4750 2050
|
||||
Text Notes 5550 3500 0 50 ~ 0
|
||||
Microcontroller
|
||||
Wire Notes Line
|
||||
6900 1500 6900 4650
|
||||
Wire Notes Line
|
||||
6900 4650 8150 4650
|
||||
Wire Notes Line
|
||||
8150 4650 8150 1500
|
||||
Wire Notes Line
|
||||
8150 1500 6900 1500
|
||||
Text Notes 6950 1650 0 50 ~ 0
|
||||
Analog Discovery 2
|
||||
$EndSCHEMATC
|
201
lab_1/lab1_schematic/lab1_schematic.sch-bak
Normal file
201
lab_1/lab1_schematic/lab1_schematic.sch-bak
Normal file
@ -0,0 +1,201 @@
|
||||
EESchema Schematic File Version 4
|
||||
EELAYER 30 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 1
|
||||
Title ""
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp ""
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
$Comp
|
||||
L 312:ATTINY13A U?
|
||||
U 1 1 5D9B7CC8
|
||||
P 5150 3100
|
||||
F 0 "U?" H 5375 3875 50 0000 C CNN
|
||||
F 1 "ATTINY13A" H 5375 3784 50 0000 C CNN
|
||||
F 2 "" H 5400 3550 50 0001 C CNN
|
||||
F 3 "" H 5400 3550 50 0001 C CNN
|
||||
1 5150 3100
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L 312:ICE_SPI P?
|
||||
U 1 1 5D9B8E3A
|
||||
P 3150 3500
|
||||
F 0 "P?" H 3358 4675 50 0000 C CNN
|
||||
F 1 "ICE_SPI" H 3358 4584 50 0000 C CNN
|
||||
F 2 "" H 3500 4100 50 0001 C CNN
|
||||
F 3 "" H 3500 4100 50 0001 C CNN
|
||||
1 3150 3500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L 312:ADISCOVERY P?
|
||||
U 1 1 5D9BBE82
|
||||
P 7250 4250
|
||||
F 0 "P?" H 7525 6725 50 0000 C CNN
|
||||
F 1 "ADISCOVERY" H 7525 6634 50 0000 C CNN
|
||||
F 2 "" H 7250 6350 50 0001 C CNN
|
||||
F 3 "" H 7250 6350 50 0001 C CNN
|
||||
1 7250 4250
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
3550 2650 4100 2650
|
||||
Wire Wire Line
|
||||
4100 2650 4100 3450
|
||||
Wire Wire Line
|
||||
3550 3450 4100 3450
|
||||
Connection ~ 4100 3450
|
||||
Wire Wire Line
|
||||
4100 3450 4100 3700
|
||||
Wire Wire Line
|
||||
3550 2850 3950 2850
|
||||
Wire Wire Line
|
||||
3950 2850 3950 2350
|
||||
Text Label 3700 2750 0 50 ~ 0
|
||||
MISO
|
||||
Wire Wire Line
|
||||
3550 2750 3700 2750
|
||||
Wire Wire Line
|
||||
3550 2550 3700 2550
|
||||
Wire Wire Line
|
||||
3550 3050 3700 3050
|
||||
Wire Wire Line
|
||||
3550 3350 3700 3350
|
||||
Text Label 3700 2550 0 50 ~ 0
|
||||
SCK
|
||||
Text Label 3700 3050 0 50 ~ 0
|
||||
~RESET
|
||||
Text Label 3700 3350 0 50 ~ 0
|
||||
MOSI
|
||||
$Comp
|
||||
L power:VCC #PWR?
|
||||
U 1 1 5D9C1403
|
||||
P 3950 2350
|
||||
F 0 "#PWR?" H 3950 2200 50 0001 C CNN
|
||||
F 1 "VCC" H 3967 2523 50 0000 C CNN
|
||||
F 2 "" H 3950 2350 50 0001 C CNN
|
||||
F 3 "" H 3950 2350 50 0001 C CNN
|
||||
1 3950 2350
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:GND #PWR?
|
||||
U 1 1 5D9C16FB
|
||||
P 4100 3700
|
||||
F 0 "#PWR?" H 4100 3450 50 0001 C CNN
|
||||
F 1 "GND" H 4105 3527 50 0000 C CNN
|
||||
F 2 "" H 4100 3700 50 0001 C CNN
|
||||
F 3 "" H 4100 3700 50 0001 C CNN
|
||||
1 4100 3700
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
5050 3050 4950 3050
|
||||
Wire Wire Line
|
||||
4950 3050 4950 3250
|
||||
$Comp
|
||||
L power:GND #PWR?
|
||||
U 1 1 5D9C1C4C
|
||||
P 4950 3250
|
||||
F 0 "#PWR?" H 4950 3000 50 0001 C CNN
|
||||
F 1 "GND" H 4955 3077 50 0000 C CNN
|
||||
F 2 "" H 4950 3250 50 0001 C CNN
|
||||
F 3 "" H 4950 3250 50 0001 C CNN
|
||||
1 4950 3250
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:VCC #PWR?
|
||||
U 1 1 5D9C1E2A
|
||||
P 4900 2350
|
||||
F 0 "#PWR?" H 4900 2200 50 0001 C CNN
|
||||
F 1 "VCC" H 4917 2523 50 0000 C CNN
|
||||
F 2 "" H 4900 2350 50 0001 C CNN
|
||||
F 3 "" H 4900 2350 50 0001 C CNN
|
||||
1 4900 2350
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
5050 2550 4900 2550
|
||||
Wire Wire Line
|
||||
4900 2550 4900 2350
|
||||
Wire Notes Line
|
||||
3050 2050 4250 2050
|
||||
Wire Notes Line
|
||||
4250 2050 4250 4050
|
||||
Wire Notes Line
|
||||
4250 4050 3050 4050
|
||||
Wire Notes Line
|
||||
3050 4050 3050 2050
|
||||
Text Notes 3100 4000 0 50 ~ 0
|
||||
Atmel ICE\nProgramming Header
|
||||
Wire Wire Line
|
||||
5700 2550 5850 2550
|
||||
Text Label 5850 2550 0 50 ~ 0
|
||||
~RESET
|
||||
Wire Wire Line
|
||||
5700 2850 5850 2850
|
||||
Text Label 5850 2850 0 50 ~ 0
|
||||
SCK
|
||||
Text Label 5850 2950 0 50 ~ 0
|
||||
MISO
|
||||
Text Label 5850 3050 0 50 ~ 0
|
||||
MOSI
|
||||
Wire Wire Line
|
||||
5700 2950 5850 2950
|
||||
Wire Wire Line
|
||||
5700 3050 5850 3050
|
||||
Text Label 6550 2000 0 50 ~ 0
|
||||
WAVEOUT
|
||||
Wire Wire Line
|
||||
7900 2000 8050 2000
|
||||
Wire Wire Line
|
||||
8050 2000 8050 1800
|
||||
$Comp
|
||||
L power:VCC #PWR?
|
||||
U 1 1 5D9C6149
|
||||
P 8050 1800
|
||||
F 0 "#PWR?" H 8050 1650 50 0001 C CNN
|
||||
F 1 "VCC" H 8067 1973 50 0000 C CNN
|
||||
F 2 "" H 8050 1800 50 0001 C CNN
|
||||
F 3 "" H 8050 1800 50 0001 C CNN
|
||||
1 8050 1800
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
7900 3900 7900 4000
|
||||
Wire Wire Line
|
||||
7900 4100 7900 4200
|
||||
Wire Wire Line
|
||||
7900 4200 7900 4350
|
||||
Connection ~ 7900 4200
|
||||
Wire Wire Line
|
||||
7900 4000 7900 4100
|
||||
Connection ~ 7900 4000
|
||||
Connection ~ 7900 4100
|
||||
$Comp
|
||||
L power:GND #PWR?
|
||||
U 1 1 5D9C7A2D
|
||||
P 7900 4350
|
||||
F 0 "#PWR?" H 7900 4100 50 0001 C CNN
|
||||
F 1 "GND" H 7905 4177 50 0000 C CNN
|
||||
F 2 "" H 7900 4350 50 0001 C CNN
|
||||
F 3 "" H 7900 4350 50 0001 C CNN
|
||||
1 7900 4350
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
6500 2000 7150 2000
|
||||
Wire Wire Line
|
||||
6500 2000 6500 2750
|
||||
Wire Wire Line
|
||||
6500 2750 5700 2750
|
||||
$EndSCHEMATC
|
42
lab_1/main.c
42
lab_1/main.c
@ -1,20 +1,36 @@
|
||||
/* main.c
|
||||
*
|
||||
*
|
||||
* Created: 9/24/2019 2:15:19 PM
|
||||
* Author: wfarmer, dlenfesty
|
||||
*/
|
||||
|
||||
// CLKDIV8 was set on our processor
|
||||
#define F_CPU 1200000UL
|
||||
#define ON_TIME 9 // On time for pulses, accounting for overhead
|
||||
#define END_TIME 87.5 // Off time at the end of the pulse train (tuned for overhead + clock drift)
|
||||
#define NUM_PULSES 15
|
||||
|
||||
#include <avr/io.h>
|
||||
#include <util/delay.h>
|
||||
|
||||
int main(void) {
|
||||
DDRB |= (1 << DDB3);
|
||||
|
||||
// Set PB5 low
|
||||
PORTB &= ~(1 << PORTB3);
|
||||
|
||||
// Set up GPIO here
|
||||
void pin_setup() {
|
||||
DDRB |= (1 << DDB3);
|
||||
}
|
||||
|
||||
|
||||
int main() {
|
||||
pin_setup();
|
||||
|
||||
while (1) {
|
||||
PORTB ^= (1 << PORTB3);
|
||||
_delay_ms(500);
|
||||
// Main loop
|
||||
while (1) {
|
||||
// Loop for all pulses, high then low, excluding 15th low pulse, which is 100us
|
||||
for (uint8_t i = 0; i < (NUM_PULSES * 2) - 1; i++) {
|
||||
// Toggle PB5
|
||||
PORTB ^= (1 << PORTB3);
|
||||
_delay_us(ON_TIME);
|
||||
}
|
||||
|
||||
|
||||
// Last low pulse
|
||||
PORTB &= ~(1 << PORTB3);
|
||||
_delay_us(END_TIME);
|
||||
}
|
||||
}
|
||||
|
36
lab_1/main.txt
Normal file
36
lab_1/main.txt
Normal file
@ -0,0 +1,36 @@
|
||||
/* main.c
|
||||
*
|
||||
*
|
||||
* Created: 9/24/2019 2:15:19 PM
|
||||
* Author: wfarmer, dlenfesty
|
||||
*/
|
||||
|
||||
// CLKDIV8 was set on our processor
|
||||
#define F_CPU 1200000UL
|
||||
#define ON_TIME 9 // On time for pulses, accounting for overhead
|
||||
#define END_TIME 87.5 // Off time at the end of the pulse train (tuned for overhead + clock drift)
|
||||
#define NUM_PULSES 15
|
||||
|
||||
#include <avr/io.h>
|
||||
#include <util/delay.h>
|
||||
|
||||
int main(void) {
|
||||
DDRB |= (1 << DDB3);
|
||||
|
||||
// Set PB5 low
|
||||
PORTB &= ~(1 << PORTB3);
|
||||
|
||||
// Main loop
|
||||
while (1) {
|
||||
// Loop for all pulses, high then low, excluding 15th low pulse, which is 100us
|
||||
for (uint8_t i = 0; i < (NUM_PULSES * 2) - 1; i++) {
|
||||
// Toggle PB5
|
||||
PORTB ^= (1 << PORTB3);
|
||||
_delay_us(ON_TIME);
|
||||
}
|
||||
|
||||
// Last low pulse
|
||||
PORTB &= ~(1 << PORTB3);
|
||||
_delay_us(END_TIME);
|
||||
}
|
||||
}
|
23
lab_2/Empty LaTex ReportV1.aux
Normal file
23
lab_2/Empty LaTex ReportV1.aux
Normal file
@ -0,0 +1,23 @@
|
||||
\relax
|
||||
\providecommand\hyper@newdestlabel[2]{}
|
||||
\providecommand\HyperFirstAtBeginDocument{\AtBeginDocument}
|
||||
\HyperFirstAtBeginDocument{\ifx\hyper@anchor\@undefined
|
||||
\global\let\oldcontentsline\contentsline
|
||||
\gdef\contentsline#1#2#3#4{\oldcontentsline{#1}{#2}{#3}}
|
||||
\global\let\oldnewlabel\newlabel
|
||||
\gdef\newlabel#1#2{\newlabelxx{#1}#2}
|
||||
\gdef\newlabelxx#1#2#3#4#5#6{\oldnewlabel{#1}{{#2}{#3}}}
|
||||
\AtEndDocument{\ifx\hyper@anchor\@undefined
|
||||
\let\contentsline\oldcontentsline
|
||||
\let\newlabel\oldnewlabel
|
||||
\fi}
|
||||
\fi}
|
||||
\global\let\hyper@last\relax
|
||||
\gdef\HyperFirstAtBeginDocument#1{#1}
|
||||
\providecommand\HyField@AuxAddToFields[1]{}
|
||||
\providecommand\HyField@AuxAddToCoFields[2]{}
|
||||
\@writefile{toc}{\contentsline {section}{\numberline {1}Brief Description}{1}{section.1}}
|
||||
\@writefile{toc}{\contentsline {section}{\numberline {2}Target Specifications}{1}{section.2}}
|
||||
\@writefile{toc}{\contentsline {section}{\numberline {3}Schematic}{1}{section.3}}
|
||||
\@writefile{toc}{\contentsline {section}{\numberline {4}Firmware Plan}{1}{section.4}}
|
||||
\@writefile{toc}{\contentsline {section}{\numberline {5}Parts Required}{1}{section.5}}
|
95
lab_2/Empty LaTex ReportV1.fdb_latexmk
Normal file
95
lab_2/Empty LaTex ReportV1.fdb_latexmk
Normal file
@ -0,0 +1,95 @@
|
||||
# Fdb version 3
|
||||
["pdflatex"] 1570724546 "/home/david/Documents/homework/ECE_312/lab/lab_2/Empty LaTex ReportV1.tex" "/home/david/Documents/homework/ECE_312/lab/lab_2/Empty LaTex ReportV1.pdf" "Empty LaTex ReportV1" 1570724546
|
||||
"/etc/texmf/web2c/texmf.cnf" 1567530603 475 c0e671620eb5563b2130f56340a5fde8 ""
|
||||
"/home/david/Documents/homework/ECE_312/lab/lab_2/Empty LaTex ReportV1.aux" 1570724546 1101 c03febe99fcc7c400611da31896ca24d ""
|
||||
"/home/david/Documents/homework/ECE_312/lab/lab_2/Empty LaTex ReportV1.tex" 1570724546 1526 31ebeef1956784c2ac73d49c98b9df7a ""
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||||
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||||
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pdfpagemode=UseOutlines, % this is the option you were lookin for
|
||||
pdfpagelayout=TwoPageRight
|
||||
}
|
||||
|
||||
\title{ {\Huge \docTitle{}} \\
|
||||
\courseNum{} - \labName{} - \labSection{} - Tuesday}
|
||||
\author{
|
||||
David Lenfesty\\
|
||||
\texttt{lenfesty@ualberta.ca}\\
|
||||
\texttt{ID: 1531446}
|
||||
\and
|
||||
Willard Farmer\\
|
||||
\texttt{wfarmer@ualberta.ca}\\
|
||||
\texttt{ID: XXXXXXX}
|
||||
}
|
||||
|
||||
\begin{document}
|
||||
\pagenumbering{roman}
|
||||
\maketitle
|
||||
\newpage
|
||||
\tableofcontents
|
||||
\newpage
|
||||
|
||||
\pagenumbering{arabic}
|
||||
|
||||
\section{Brief Description}
|
||||
|
||||
\section{Target Specifications}
|
||||
|
||||
\section{Schematic}
|
||||
|
||||
\section{Firmware Plan}
|
||||
|
||||
\section{Parts Required}
|
||||
|
||||
\begin{table}[H]
|
||||
\centering
|
||||
\begin{tabular}{c | c | c}
|
||||
\textbf{Partno. / Description} & \textbf{Number Required} & \textbf{Return} \\
|
||||
Attiny2313A & 1 & $\square$ \\
|
||||
Piezoelectric Buzzer & 2 & $\square$ \\
|
||||
Momentary Pushbutton & 1 & $\square$ \\
|
||||
\end{tabular}
|
||||
\end{table}
|
||||
|
||||
|
||||
|
||||
\end{document}
|
5
lab_2/Empty LaTex ReportV1.toc
Normal file
5
lab_2/Empty LaTex ReportV1.toc
Normal file
@ -0,0 +1,5 @@
|
||||
\contentsline {section}{\numberline {1}Brief Description}{1}{section.1}
|
||||
\contentsline {section}{\numberline {2}Target Specifications}{1}{section.2}
|
||||
\contentsline {section}{\numberline {3}Schematic}{1}{section.3}
|
||||
\contentsline {section}{\numberline {4}Firmware Plan}{1}{section.4}
|
||||
\contentsline {section}{\numberline {5}Parts Required}{1}{section.5}
|
16
lab_2/main.c
16
lab_2/main.c
@ -1,16 +0,0 @@
|
||||
#include <avr/io.h>
|
||||
|
||||
// Set up GPIO here
|
||||
void pin_setup() {
|
||||
|
||||
}
|
||||
|
||||
|
||||
int main() {
|
||||
pin_setup()
|
||||
|
||||
while (1) {
|
||||
|
||||
}
|
||||
|
||||
}
|
0
lab_3/main.c
Normal file → Executable file
0
lab_3/main.c
Normal file → Executable file
0
lab_4/main.c
Normal file → Executable file
0
lab_4/main.c
Normal file → Executable file
Loading…
Reference in New Issue
Block a user