David Lenfesty
0bff1ffcac
Imported code from larger repo for code. Has some stuff I didn't want here.
91 lines
2.1 KiB
C
91 lines
2.1 KiB
C
#include "main.h"
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#include <avr/interrupt.h>
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/** @brief intercepts incoming Serial commands
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*/
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ISR(USART_RX_vect) {
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cli();
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// Read byte into FIFO
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fifo_push(UDR0);
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// Flag is cleared by reading data from UDR
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sei();
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}
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/** @brief Interrupt handler for actually playing music
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*
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* Will only be called if the TIFR OCF0A flag is high, using that as our play/pause flag
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*
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* This may be possible to hand-optimise better, but I cut it down to ~40 instructions
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* which should be fine at 16MHz
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*/
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ISR(TIMER0_COMPA_vect) {
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cli();
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// Handle music playing
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/* DAC0 -> DAC5 are on PC0 -> PC5
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* Nothing relevent is on the rest of PORTC
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*
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* DAC6 -> DAC11 is PD2->PD7
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*
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* DAC12 and DAC13 are PB0 and PB1
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*/
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uint16_t in_data = song_buf[song_buf_select][song_position];
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// Split into 8 bit because we are using an 8 bit MCU, so code can be better
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uint8_t data_lo = in_data;
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uint8_t data_hi = in_data >> 8;
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// DAC0 -> DAC5
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PORTC = (data_lo >> 2) & 0x3F;
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// DAC6 -> DAC11
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PORTD &= 0x03;
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PORTD |= data_hi << 2;
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// DAC12 and DAC13
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PORTB &= 0xFC; // clear bits
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PORTB |= data_hi >> 6;
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// Go to next sample
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song_position++;
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// Can just wrap if it's 8 bit
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sei();
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}
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void gpio_init() {
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// Initialise all DAC outputs
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/* DAC0 -> DAC5 are on PC0 -> PC5
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* Nothing relevent is on the rest of PORTC
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*
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* DAC6 -> DAC11 is PD2->PD7
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*
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* DAC12 and DAC13 are PB0 and PB1
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*/
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DDRC |= 0x3F;
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DDRD |= 0xFC;
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DDRC |= 0x03;
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}
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void timer_init() {
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// Compare outputs should be default, nothing
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// Set to CTC, WGM = 0b010
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TCCR0A = (1 << OCIE0A);
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// Set timer to use clock input w/o prescaling
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TCCR0B = 1;
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// 16 MHz / 44kHz = 182 clock cycles
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// Pushing it for time, may have to move to 8 bit...
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OCR0A = 182;
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// Don't enable the interrupt yet
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}
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void usart_init() {
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// set baudrate
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UBRR0L = UBRR_VALUE & 255;
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UBRR0H = UBRR_VALUE >> 8;
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// Set data info, no parity, 1 stop, 8-bit
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UCSR0C |= (1 << UCSZ01) | (1 << UCSZ00);
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// Start it up
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UCSR0B |= (1 << TXEN0) | (1 << RXEN0);
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} |