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Finished relay shift register thingy

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This commit is contained in:
David Lenfesty 2019-11-17 14:25:50 -07:00
parent 7aa6ea3c70
commit 3c4626602c
6 changed files with 74456 additions and 0 deletions
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1
16Channel-LED-Driver/fp-info-cache Normal file
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relay-shift/fp-info-cache Normal file
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199
relay-shift/relay-shift-cache.lib Normal file
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EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# 74xx_74HC595
#
DEF 74xx_74HC595 U 0 20 Y Y 1 F N
F0 "U" -300 550 50 H V C CNN
F1 "74xx_74HC595" -300 -650 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 74LS595 74HCT595
$FPLIST
DIP*W7.62mm*
SOIC*3.9x9.9mm*P1.27mm*
TSSOP*4.4x5mm*P0.65mm*
SOIC*5.3x10.2mm*P1.27mm*
SOIC*7.5x10.3mm*P1.27mm*
$ENDFPLIST
DRAW
S -300 500 300 -600 1 1 10 f
X QB 1 400 300 100 L 50 50 1 0 T
X ~SRCLR 10 -400 100 100 R 50 50 1 0 I
X SRCLK 11 -400 200 100 R 50 50 1 0 I
X RCLK 12 -400 -100 100 R 50 50 1 0 I
X ~OE 13 -400 -200 100 R 50 50 1 0 I
X SER 14 -400 400 100 R 50 50 1 0 I
X QA 15 400 400 100 L 50 50 1 0 T
X VCC 16 0 600 100 D 50 50 1 0 W
X QC 2 400 200 100 L 50 50 1 0 T
X QD 3 400 100 100 L 50 50 1 0 T
X QE 4 400 0 100 L 50 50 1 0 T
X QF 5 400 -100 100 L 50 50 1 0 T
X QG 6 400 -200 100 L 50 50 1 0 T
X QH 7 400 -300 100 L 50 50 1 0 T
X GND 8 0 -700 100 U 50 50 1 0 W
X QH' 9 400 -500 100 L 50 50 1 0 O
ENDDRAW
ENDDEF
#
# Connector_Conn_01x07_Female
#
DEF Connector_Conn_01x07_Female J 0 40 Y N 1 F N
F0 "J" 0 400 50 H V C CNN
F1 "Connector_Conn_01x07_Female" 0 -400 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
A 0 -300 20 901 -901 1 1 6 N 0 -280 0 -320
A 0 -200 20 901 -901 1 1 6 N 0 -180 0 -220
A 0 -100 20 901 -901 1 1 6 N 0 -80 0 -120
A 0 0 20 901 -901 1 1 6 N 0 20 0 -20
A 0 100 20 901 -901 1 1 6 N 0 120 0 80
A 0 200 20 901 -901 1 1 6 N 0 220 0 180
A 0 300 20 901 -901 1 1 6 N 0 320 0 280
P 2 1 1 6 -50 -300 -20 -300 N
P 2 1 1 6 -50 -200 -20 -200 N
P 2 1 1 6 -50 -100 -20 -100 N
P 2 1 1 6 -50 0 -20 0 N
P 2 1 1 6 -50 100 -20 100 N
P 2 1 1 6 -50 200 -20 200 N
P 2 1 1 6 -50 300 -20 300 N
X Pin_1 1 -200 300 150 R 50 50 1 1 P
X Pin_2 2 -200 200 150 R 50 50 1 1 P
X Pin_3 3 -200 100 150 R 50 50 1 1 P
X Pin_4 4 -200 0 150 R 50 50 1 1 P
X Pin_5 5 -200 -100 150 R 50 50 1 1 P
X Pin_6 6 -200 -200 150 R 50 50 1 1 P
X Pin_7 7 -200 -300 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Conn_01x07_Male
#
DEF Connector_Conn_01x07_Male J 0 40 Y N 1 F N
F0 "J" 0 400 50 H V C CNN
F1 "Connector_Conn_01x07_Male" 0 -400 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S 34 -295 0 -305 1 1 6 F
S 34 -195 0 -205 1 1 6 F
S 34 -95 0 -105 1 1 6 F
S 34 5 0 -5 1 1 6 F
S 34 105 0 95 1 1 6 F
S 34 205 0 195 1 1 6 F
S 34 305 0 295 1 1 6 F
P 2 1 1 6 50 -300 34 -300 N
P 2 1 1 6 50 -200 34 -200 N
P 2 1 1 6 50 -100 34 -100 N
P 2 1 1 6 50 0 34 0 N
P 2 1 1 6 50 100 34 100 N
P 2 1 1 6 50 200 34 200 N
P 2 1 1 6 50 300 34 300 N
X Pin_1 1 200 300 150 L 50 50 1 1 P
X Pin_2 2 200 200 150 L 50 50 1 1 P
X Pin_3 3 200 100 150 L 50 50 1 1 P
X Pin_4 4 200 0 150 L 50 50 1 1 P
X Pin_5 5 200 -100 150 L 50 50 1 1 P
X Pin_6 6 200 -200 150 L 50 50 1 1 P
X Pin_7 7 200 -300 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Conn_01x10_Female
#
DEF Connector_Conn_01x10_Female J 0 40 Y N 1 F N
F0 "J" 0 500 50 H V C CNN
F1 "Connector_Conn_01x10_Female" 0 -600 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
A 0 -500 20 901 -901 1 1 6 N 0 -480 0 -520
A 0 -400 20 901 -901 1 1 6 N 0 -380 0 -420
A 0 -300 20 901 -901 1 1 6 N 0 -280 0 -320
A 0 -200 20 901 -901 1 1 6 N 0 -180 0 -220
A 0 -100 20 901 -901 1 1 6 N 0 -80 0 -120
A 0 0 20 901 -901 1 1 6 N 0 20 0 -20
A 0 100 20 901 -901 1 1 6 N 0 120 0 80
A 0 200 20 901 -901 1 1 6 N 0 220 0 180
A 0 300 20 901 -901 1 1 6 N 0 320 0 280
A 0 400 20 901 -901 1 1 6 N 0 420 0 380
P 2 1 1 6 -50 -500 -20 -500 N
P 2 1 1 6 -50 -400 -20 -400 N
P 2 1 1 6 -50 -300 -20 -300 N
P 2 1 1 6 -50 -200 -20 -200 N
P 2 1 1 6 -50 -100 -20 -100 N
P 2 1 1 6 -50 0 -20 0 N
P 2 1 1 6 -50 100 -20 100 N
P 2 1 1 6 -50 200 -20 200 N
P 2 1 1 6 -50 300 -20 300 N
P 2 1 1 6 -50 400 -20 400 N
X Pin_1 1 -200 400 150 R 50 50 1 1 P
X Pin_10 10 -200 -500 150 R 50 50 1 1 P
X Pin_2 2 -200 300 150 R 50 50 1 1 P
X Pin_3 3 -200 200 150 R 50 50 1 1 P
X Pin_4 4 -200 100 150 R 50 50 1 1 P
X Pin_5 5 -200 0 150 R 50 50 1 1 P
X Pin_6 6 -200 -100 150 R 50 50 1 1 P
X Pin_7 7 -200 -200 150 R 50 50 1 1 P
X Pin_8 8 -200 -300 150 R 50 50 1 1 P
X Pin_9 9 -200 -400 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_R
#
DEF Device_R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "Device_R" 0 0 50 V V C CNN
F2 "" -70 0 50 V I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
R_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# power_+5V
#
DEF power_+5V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+5V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +5V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
#End Library

865
relay-shift/relay-shift.kicad_pcb Normal file
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(kicad_pcb (version 20171130) (host pcbnew 5.1.4-e60b266~84~ubuntu18.04.1)
(general
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(drawings 8)
(tracks 130)
(zones 0)
(modules 5)
(nets 17)
)
(page A4)
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(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
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(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.051)
(solder_mask_min_width 0.25)
(aux_axis_origin 0 0)
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(layerselection 0x010fc_ffffffff)
(usegerberextensions false)
(usegerberattributes false)
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(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 GND)
(net 2 /~OE)
(net 3 /RCLK)
(net 4 /~SRCLR)
(net 5 /SRCLK)
(net 6 /SERIN)
(net 7 +5V)
(net 8 /SEROUT)
(net 9 "Net-(J103-Pad9)")
(net 10 "Net-(J103-Pad8)")
(net 11 "Net-(J103-Pad7)")
(net 12 "Net-(J103-Pad6)")
(net 13 "Net-(J103-Pad5)")
(net 14 "Net-(J103-Pad4)")
(net 15 "Net-(J103-Pad3)")
(net 16 "Net-(J103-Pad2)")
(net_class Default "This is the default net class."
(clearance 0.2)
(trace_width 0.25)
(via_dia 0.8)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net +5V)
(add_net /RCLK)
(add_net /SERIN)
(add_net /SEROUT)
(add_net /SRCLK)
(add_net /~OE)
(add_net /~SRCLR)
(add_net GND)
(add_net "Net-(J103-Pad2)")
(add_net "Net-(J103-Pad3)")
(add_net "Net-(J103-Pad4)")
(add_net "Net-(J103-Pad5)")
(add_net "Net-(J103-Pad6)")
(add_net "Net-(J103-Pad7)")
(add_net "Net-(J103-Pad8)")
(add_net "Net-(J103-Pad9)")
)
(module Package_SO:SOIC-16W_7.5x10.3mm_P1.27mm (layer F.Cu) (tedit 5C97300E) (tstamp 5DD21950)
(at 157.48 76.2)
(descr "SOIC, 16 Pin (JEDEC MS-013AA, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_wide-rw/rw_16.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py")
(tags "SOIC SO")
(path /5DD1B1EA)
(attr smd)
(fp_text reference U101 (at 0 -6.1) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 74HC595 (at 0 6.1) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 5.93 -5.4) (end -5.93 -5.4) (layer F.CrtYd) (width 0.05))
(fp_line (start 5.93 5.4) (end 5.93 -5.4) (layer F.CrtYd) (width 0.05))
(fp_line (start -5.93 5.4) (end 5.93 5.4) (layer F.CrtYd) (width 0.05))
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(fp_line (start -3.75 -4.15) (end -2.75 -5.15) (layer F.Fab) (width 0.1))
(fp_line (start -3.75 5.15) (end -3.75 -4.15) (layer F.Fab) (width 0.1))
(fp_line (start 3.75 5.15) (end -3.75 5.15) (layer F.Fab) (width 0.1))
(fp_line (start 3.75 -5.15) (end 3.75 5.15) (layer F.Fab) (width 0.1))
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(fp_line (start -3.86 -5.005) (end -5.675 -5.005) (layer F.SilkS) (width 0.12))
(fp_line (start -3.86 -5.26) (end -3.86 -5.005) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -5.26) (end -3.86 -5.26) (layer F.SilkS) (width 0.12))
(fp_line (start 3.86 -5.26) (end 3.86 -5.005) (layer F.SilkS) (width 0.12))
(fp_line (start 0 -5.26) (end 3.86 -5.26) (layer F.SilkS) (width 0.12))
(fp_line (start -3.86 5.26) (end -3.86 5.005) (layer F.SilkS) (width 0.12))
(fp_line (start 0 5.26) (end -3.86 5.26) (layer F.SilkS) (width 0.12))
(fp_line (start 3.86 5.26) (end 3.86 5.005) (layer F.SilkS) (width 0.12))
(fp_line (start 0 5.26) (end 3.86 5.26) (layer F.SilkS) (width 0.12))
(pad 16 smd roundrect (at 4.65 -4.445) (size 2.05 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 7 +5V))
(pad 15 smd roundrect (at 4.65 -3.175) (size 2.05 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 16 "Net-(J103-Pad2)"))
(pad 14 smd roundrect (at 4.65 -1.905) (size 2.05 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 6 /SERIN))
(pad 13 smd roundrect (at 4.65 -0.635) (size 2.05 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 /~OE))
(pad 12 smd roundrect (at 4.65 0.635) (size 2.05 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 3 /RCLK))
(pad 11 smd roundrect (at 4.65 1.905) (size 2.05 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 5 /SRCLK))
(pad 10 smd roundrect (at 4.65 3.175) (size 2.05 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 4 /~SRCLR))
(pad 9 smd roundrect (at 4.65 4.445) (size 2.05 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 8 /SEROUT))
(pad 8 smd roundrect (at -4.65 4.445) (size 2.05 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 7 smd roundrect (at -4.65 3.175) (size 2.05 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 9 "Net-(J103-Pad9)"))
(pad 6 smd roundrect (at -4.65 1.905) (size 2.05 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 10 "Net-(J103-Pad8)"))
(pad 5 smd roundrect (at -4.65 0.635) (size 2.05 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 11 "Net-(J103-Pad7)"))
(pad 4 smd roundrect (at -4.65 -0.635) (size 2.05 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 12 "Net-(J103-Pad6)"))
(pad 3 smd roundrect (at -4.65 -1.905) (size 2.05 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 13 "Net-(J103-Pad5)"))
(pad 2 smd roundrect (at -4.65 -3.175) (size 2.05 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 14 "Net-(J103-Pad4)"))
(pad 1 smd roundrect (at -4.65 -4.445) (size 2.05 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 15 "Net-(J103-Pad3)"))
(model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-16W_7.5x10.3mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5DD21AB4)
(at 167.64 73.9925 90)
(descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
(tags resistor)
(path /5DD25EBA)
(attr smd)
(fp_text reference R101 (at 0 -1.65 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value 10k (at 0 1.65 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0 90) (layer F.Fab)
(effects (font (size 0.5 0.5) (thickness 0.08)))
)
(fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
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(fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
(fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
(fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
(fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 0.9375 0 90) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 7 +5V))
(pad 1 smd roundrect (at -0.9375 0 90) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 /~OE))
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Connector_PinHeader_2.54mm:PinHeader_1x10_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC) (tstamp 5DD21620)
(at 142.24 64.77)
(descr "Through hole straight pin header, 1x10, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x10 2.54mm single row")
(path /5DD2C159)
(fp_text reference J103 (at 0 -2.33) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Conn_01x10_Female (at 0 25.19) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 11.43 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.8 24.65) (end 1.8 24.65) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 -1.8) (end -1.8 24.65) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
(fp_line (start 1.33 1.27) (end 1.33 24.19) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end -1.33 24.19) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 24.19) (end 1.33 24.19) (layer F.SilkS) (width 0.12))
(fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 24.13) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 24.13) (end -1.27 24.13) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 -1.27) (end 1.27 24.13) (layer F.Fab) (width 0.1))
(fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
(pad 10 thru_hole oval (at 0 22.86) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 1 GND))
(pad 9 thru_hole oval (at 0 20.32) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 9 "Net-(J103-Pad9)"))
(pad 8 thru_hole oval (at 0 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 10 "Net-(J103-Pad8)"))
(pad 7 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 11 "Net-(J103-Pad7)"))
(pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 12 "Net-(J103-Pad6)"))
(pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 13 "Net-(J103-Pad5)"))
(pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 14 "Net-(J103-Pad4)"))
(pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 15 "Net-(J103-Pad3)"))
(pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 16 "Net-(J103-Pad2)"))
(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 7 +5V))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x10_P2.54mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Connector_Molex:Molex_CLIK-Mate_502494-0870_1x08-1MP_P2.00mm_Horizontal (layer F.Cu) (tedit 5B78AD8A) (tstamp 5DD21602)
(at 158.75 88.9)
(descr "Molex CLIK-Mate series connector, 502494-0870 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator")
(tags "connector Molex CLIK-Mate top entry")
(path /5DD1E95A)
(attr smd)
(fp_text reference J102 (at 9.525 -3.175) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Conn_01x07_Male (at 0 6.35) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0.38) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -7 -1.092893) (end -6.5 -1.8) (layer F.Fab) (width 0.1))
(fp_line (start -7.5 -1.8) (end -7 -1.092893) (layer F.Fab) (width 0.1))
(fp_line (start 10.75 -4.35) (end -10.75 -4.35) (layer F.CrtYd) (width 0.05))
(fp_line (start 10.75 5.65) (end 10.75 -4.35) (layer F.CrtYd) (width 0.05))
(fp_line (start -10.75 5.65) (end 10.75 5.65) (layer F.CrtYd) (width 0.05))
(fp_line (start -10.75 -4.35) (end -10.75 5.65) (layer F.CrtYd) (width 0.05))
(fp_line (start 10 -1.8) (end 10 2.55) (layer F.Fab) (width 0.1))
(fp_line (start -10 -1.8) (end -10 2.55) (layer F.Fab) (width 0.1))
(fp_line (start 9.67 2.55) (end 10 2.55) (layer F.Fab) (width 0.1))
(fp_line (start 9.67 5.15) (end 9.67 2.55) (layer F.Fab) (width 0.1))
(fp_line (start -9.67 5.15) (end 9.67 5.15) (layer F.Fab) (width 0.1))
(fp_line (start -9.67 2.55) (end -9.67 5.15) (layer F.Fab) (width 0.1))
(fp_line (start -10 2.55) (end -9.67 2.55) (layer F.Fab) (width 0.1))
(fp_line (start -8.19 5.26) (end 8.19 5.26) (layer F.SilkS) (width 0.12))
(fp_line (start 10.11 -1.91) (end 7.76 -1.91) (layer F.SilkS) (width 0.12))
(fp_line (start 10.11 -0.21) (end 10.11 -1.91) (layer F.SilkS) (width 0.12))
(fp_line (start -7.76 -1.91) (end -7.76 -3.85) (layer F.SilkS) (width 0.12))
(fp_line (start -10.11 -1.91) (end -7.76 -1.91) (layer F.SilkS) (width 0.12))
(fp_line (start -10.11 -0.21) (end -10.11 -1.91) (layer F.SilkS) (width 0.12))
(fp_line (start -10 -1.8) (end 10 -1.8) (layer F.Fab) (width 0.1))
(pad MP smd roundrect (at 9.35 1.95) (size 1.8 3.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.138889))
(pad MP smd roundrect (at -9.35 1.95) (size 1.8 3.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.138889))
(pad 8 smd roundrect (at 7 -2.5) (size 1 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 7 smd roundrect (at 5 -2.5) (size 1 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 6 smd roundrect (at 3 -2.5) (size 1 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 /~OE))
(pad 5 smd roundrect (at 1 -2.5) (size 1 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 3 /RCLK))
(pad 4 smd roundrect (at -1 -2.5) (size 1 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 4 /~SRCLR))
(pad 3 smd roundrect (at -3 -2.5) (size 1 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 5 /SRCLK))
(pad 2 smd roundrect (at -5 -2.5) (size 1 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 8 /SEROUT))
(pad 1 smd roundrect (at -7 -2.5) (size 1 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 7 +5V))
(model ${KISYS3DMOD}/Connector_Molex.3dshapes/Molex_CLIK-Mate_502494-0870_1x08-1MP_P2.00mm_Horizontal.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Connector_Molex:Molex_CLIK-Mate_502494-0870_1x08-1MP_P2.00mm_Horizontal (layer F.Cu) (tedit 5B78AD8A) (tstamp 5DD215DF)
(at 158.75 59.69 180)
(descr "Molex CLIK-Mate series connector, 502494-0870 (http://www.molex.com/pdm_docs/sd/5024940270_sd.pdf), generated with kicad-footprint-generator")
(tags "connector Molex CLIK-Mate top entry")
(path /5DD1E13B)
(attr smd)
(fp_text reference J101 (at 9.525 -2.54) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Conn_01x07_Female (at 0 6.35) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0.38) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -7 -1.092893) (end -6.5 -1.8) (layer F.Fab) (width 0.1))
(fp_line (start -7.5 -1.8) (end -7 -1.092893) (layer F.Fab) (width 0.1))
(fp_line (start 10.75 -4.35) (end -10.75 -4.35) (layer F.CrtYd) (width 0.05))
(fp_line (start 10.75 5.65) (end 10.75 -4.35) (layer F.CrtYd) (width 0.05))
(fp_line (start -10.75 5.65) (end 10.75 5.65) (layer F.CrtYd) (width 0.05))
(fp_line (start -10.75 -4.35) (end -10.75 5.65) (layer F.CrtYd) (width 0.05))
(fp_line (start 10 -1.8) (end 10 2.55) (layer F.Fab) (width 0.1))
(fp_line (start -10 -1.8) (end -10 2.55) (layer F.Fab) (width 0.1))
(fp_line (start 9.67 2.55) (end 10 2.55) (layer F.Fab) (width 0.1))
(fp_line (start 9.67 5.15) (end 9.67 2.55) (layer F.Fab) (width 0.1))
(fp_line (start -9.67 5.15) (end 9.67 5.15) (layer F.Fab) (width 0.1))
(fp_line (start -9.67 2.55) (end -9.67 5.15) (layer F.Fab) (width 0.1))
(fp_line (start -10 2.55) (end -9.67 2.55) (layer F.Fab) (width 0.1))
(fp_line (start -8.19 5.26) (end 8.19 5.26) (layer F.SilkS) (width 0.12))
(fp_line (start 10.11 -1.91) (end 7.76 -1.91) (layer F.SilkS) (width 0.12))
(fp_line (start 10.11 -0.21) (end 10.11 -1.91) (layer F.SilkS) (width 0.12))
(fp_line (start -7.76 -1.91) (end -7.76 -3.85) (layer F.SilkS) (width 0.12))
(fp_line (start -10.11 -1.91) (end -7.76 -1.91) (layer F.SilkS) (width 0.12))
(fp_line (start -10.11 -0.21) (end -10.11 -1.91) (layer F.SilkS) (width 0.12))
(fp_line (start -10 -1.8) (end 10 -1.8) (layer F.Fab) (width 0.1))
(pad MP smd roundrect (at 9.35 1.95 180) (size 1.8 3.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.138889))
(pad MP smd roundrect (at -9.35 1.95 180) (size 1.8 3.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.138889))
(pad 8 smd roundrect (at 7 -2.5 180) (size 1 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
(pad 7 smd roundrect (at 5 -2.5 180) (size 1 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 1 GND))
(pad 6 smd roundrect (at 3 -2.5 180) (size 1 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 2 /~OE))
(pad 5 smd roundrect (at 1 -2.5 180) (size 1 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 3 /RCLK))
(pad 4 smd roundrect (at -1 -2.5 180) (size 1 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 4 /~SRCLR))
(pad 3 smd roundrect (at -3 -2.5 180) (size 1 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 5 /SRCLK))
(pad 2 smd roundrect (at -5 -2.5 180) (size 1 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 6 /SERIN))
(pad 1 smd roundrect (at -7 -2.5 180) (size 1 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
(net 7 +5V))
(model ${KISYS3DMOD}/Connector_Molex.3dshapes/Molex_CLIK-Mate_502494-0870_1x08-1MP_P2.00mm_Horizontal.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(gr_text SEROUT (at 153.67 83.82) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(gr_text "+5V\nSERIN\nSRCLK\n~SRCLR\nRCLK\n~OE\nGND" (at 160.02 66.675 270) (layer F.SilkS)
(effects (font (size 1.2 1) (thickness 0.15)))
)
(gr_text GND (at 144.145 87.63) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify left))
)
(gr_text "+5V\n" (at 144.145 64.77) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)) (justify left))
)
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(gr_line (start 170.18 54.61) (end 170.18 93.98) (layer Edge.Cuts) (width 0.05))
(gr_line (start 139.7 54.61) (end 170.18 54.61) (layer Edge.Cuts) (width 0.05))
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239
relay-shift/relay-shift.pro Normal file
View File

@ -0,0 +1,239 @@
update=Sun 17 Nov 2019 02:09:25 PM MST
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.25
TrackWidth2=0.508
ViaDiameter1=0.8
ViaDrill1=0.4
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.12
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.05
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.051
SolderMaskMinWidth=0.25
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.2
TrackWidth=0.25
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25

260
relay-shift/relay-shift.sch Normal file
View File

@ -0,0 +1,260 @@
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L 74xx:74HC595 U101
U 1 1 5DD1B1EA
P 5050 2250
F 0 "U101" H 5050 3031 50 0000 C CNN
F 1 "74HC595" H 5050 2940 50 0000 C CNN
F 2 "Package_SO:SOIC-16W_7.5x10.3mm_P1.27mm" H 5050 2250 50 0001 C CNN
F 3 "http://www.ti.com/lit/ds/symlink/sn74hc595.pdf" H 5050 2250 50 0001 C CNN
1 5050 2250
1 0 0 -1
$EndComp
$Comp
L Connector:Conn_01x07_Female J101
U 1 1 5DD1E13B
P 1300 1350
F 0 "J101" H 1328 1376 50 0000 L CNN
F 1 "Conn_01x07_Female" H 1328 1285 50 0000 L CNN
F 2 "Connector_Molex:Molex_CLIK-Mate_502494-0870_1x08-1MP_P2.00mm_Horizontal" H 1300 1350 50 0001 C CNN
F 3 "~" H 1300 1350 50 0001 C CNN
1 1300 1350
1 0 0 -1
$EndComp
$Comp
L Connector:Conn_01x07_Male J102
U 1 1 5DD1E95A
P 2300 1350
F 0 "J102" H 2408 1831 50 0000 C CNN
F 1 "Conn_01x07_Male" H 2408 1740 50 0000 C CNN
F 2 "Connector_Molex:Molex_CLIK-Mate_502494-0870_1x08-1MP_P2.00mm_Horizontal" H 2300 1350 50 0001 C CNN
F 3 "~" H 2300 1350 50 0001 C CNN
1 2300 1350
1 0 0 -1
$EndComp
Wire Wire Line
1100 1050 900 1050
Wire Wire Line
1100 1250 900 1250
Wire Wire Line
900 1150 1100 1150
Wire Wire Line
1100 1350 900 1350
Wire Wire Line
1100 1450 900 1450
Wire Wire Line
1100 1550 900 1550
Wire Wire Line
1100 1650 900 1650
Text Label 900 1250 2 50 ~ 0
SRCLK
Text Label 900 1350 2 50 ~ 0
~SRCLR
Text Label 900 1450 2 50 ~ 0
RCLK
Text Label 900 1550 2 50 ~ 0
~OE
Text Label 900 1150 2 50 ~ 0
SERIN
Wire Wire Line
900 1050 900 950
Wire Wire Line
900 1650 900 1750
Wire Wire Line
5050 1650 5050 1300
Wire Wire Line
5050 2950 5050 3150
$Comp
L power:GND #PWR0101
U 1 1 5DD22E62
P 5050 3150
F 0 "#PWR0101" H 5050 2900 50 0001 C CNN
F 1 "GND" H 5055 2977 50 0000 C CNN
F 2 "" H 5050 3150 50 0001 C CNN
F 3 "" H 5050 3150 50 0001 C CNN
1 5050 3150
1 0 0 -1
$EndComp
$Comp
L power:+5V #PWR0102
U 1 1 5DD2325F
P 5050 1300
F 0 "#PWR0102" H 5050 1150 50 0001 C CNN
F 1 "+5V" H 5065 1473 50 0000 C CNN
F 2 "" H 5050 1300 50 0001 C CNN
F 3 "" H 5050 1300 50 0001 C CNN
1 5050 1300
1 0 0 -1
$EndComp
$Comp
L power:+5V #PWR0103
U 1 1 5DD235E7
P 900 950
F 0 "#PWR0103" H 900 800 50 0001 C CNN
F 1 "+5V" H 915 1123 50 0000 C CNN
F 2 "" H 900 950 50 0001 C CNN
F 3 "" H 900 950 50 0001 C CNN
1 900 950
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0104
U 1 1 5DD23987
P 900 1750
F 0 "#PWR0104" H 900 1500 50 0001 C CNN
F 1 "GND" H 905 1577 50 0000 C CNN
F 2 "" H 900 1750 50 0001 C CNN
F 3 "" H 900 1750 50 0001 C CNN
1 900 1750
1 0 0 -1
$EndComp
Text Label 5450 2750 0 50 ~ 0
SEROUT
Text Label 2500 1150 0 50 ~ 0
SEROUT
Text Label 2500 1250 0 50 ~ 0
SRCLK
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~SRCLR
Text Label 2500 1450 0 50 ~ 0
RCLK
Text Label 2500 1550 0 50 ~ 0
~OE
Wire Wire Line
2500 1050 2600 1050
Wire Wire Line
2600 1050 2600 850
Wire Wire Line
2500 1650 2600 1650
Wire Wire Line
2600 1650 2600 1850
$Comp
L power:+5V #PWR0105
U 1 1 5DD25298
P 2600 850
F 0 "#PWR0105" H 2600 700 50 0001 C CNN
F 1 "+5V" H 2615 1023 50 0000 C CNN
F 2 "" H 2600 850 50 0001 C CNN
F 3 "" H 2600 850 50 0001 C CNN
1 2600 850
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0106
U 1 1 5DD2552E
P 2600 1850
F 0 "#PWR0106" H 2600 1600 50 0001 C CNN
F 1 "GND" H 2605 1677 50 0000 C CNN
F 2 "" H 2600 1850 50 0001 C CNN
F 3 "" H 2600 1850 50 0001 C CNN
1 2600 1850
1 0 0 -1
$EndComp
Text Label 4650 1850 2 50 ~ 0
SERIN
Text Label 4650 2050 2 50 ~ 0
SRCLK
Text Label 4650 2150 2 50 ~ 0
~SRCLR
Text Label 4650 2350 2 50 ~ 0
RCLK
Text Label 4650 2450 2 50 ~ 0
~OE
$Comp
L Device:R R101
U 1 1 5DD25EBA
P 3950 2300
F 0 "R101" H 3880 2254 50 0000 R CNN
F 1 "10k" H 3880 2345 50 0000 R CNN
F 2 "Resistor_SMD:R_0805_2012Metric" V 3880 2300 50 0001 C CNN
F 3 "~" H 3950 2300 50 0001 C CNN
1 3950 2300
-1 0 0 1
$EndComp
Wire Wire Line
4650 2450 3950 2450
$Comp
L power:+5V #PWR0107
U 1 1 5DD27017
P 3950 2050
F 0 "#PWR0107" H 3950 1900 50 0001 C CNN
F 1 "+5V" H 3965 2223 50 0000 C CNN
F 2 "" H 3950 2050 50 0001 C CNN
F 3 "" H 3950 2050 50 0001 C CNN
1 3950 2050
1 0 0 -1
$EndComp
Wire Wire Line
3950 2050 3950 2150
$Comp
L Connector:Conn_01x10_Female J103
U 1 1 5DD2C159
P 7200 2150
F 0 "J103" H 7228 2126 50 0000 L CNN
F 1 "Conn_01x10_Female" H 7228 2035 50 0000 L CNN
F 2 "Connector_PinHeader_2.54mm:PinHeader_1x10_P2.54mm_Vertical" H 7200 2150 50 0001 C CNN
F 3 "~" H 7200 2150 50 0001 C CNN
1 7200 2150
1 0 0 -1
$EndComp
Wire Wire Line
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Wire Wire Line
5450 1950 7000 1950
Wire Wire Line
5450 2050 7000 2050
Wire Wire Line
5450 2150 7000 2150
Wire Wire Line
5450 2250 7000 2250
Wire Wire Line
5450 2350 7000 2350
Wire Wire Line
5450 2450 7000 2450
Wire Wire Line
5450 2550 7000 2550
Wire Wire Line
7000 2650 6800 2650
Wire Wire Line
6800 2650 6800 2900
Wire Wire Line
7000 1750 6800 1750
Wire Wire Line
6800 1750 6800 1550
$Comp
L power:+5V #PWR0108
U 1 1 5DD2F0CB
P 6800 1550
F 0 "#PWR0108" H 6800 1400 50 0001 C CNN
F 1 "+5V" H 6815 1723 50 0000 C CNN
F 2 "" H 6800 1550 50 0001 C CNN
F 3 "" H 6800 1550 50 0001 C CNN
1 6800 1550
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0109
U 1 1 5DD2F362
P 6800 2900
F 0 "#PWR0109" H 6800 2650 50 0001 C CNN
F 1 "GND" H 6805 2727 50 0000 C CNN
F 2 "" H 6800 2900 50 0001 C CNN
F 3 "" H 6800 2900 50 0001 C CNN
1 6800 2900
1 0 0 -1
$EndComp
$EndSCHEMATC