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Finished schematic for Altoids Power Supply

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Also did a few footprints, most of them not needed.
This commit is contained in:
isthatme 2017-11-24 09:33:19 -07:00
parent 2cc44509ec
commit e09d95650d
13 changed files with 2213 additions and 0 deletions
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8
Altoids-PowerSupply/Altoids-PowerSupply-cache.bck Normal file
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EESchema-DOCLIB Version 2.0
#
$CMP MC34063
D Switching Power Supply Controller
K SMPS
$ENDCMP
#
#End Doc Library

8
Altoids-PowerSupply/Altoids-PowerSupply-cache.dcm Normal file
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EESchema-DOCLIB Version 2.0
#
$CMP MC34063
D Switching Power Supply Controller
K SMPS
$ENDCMP
#
#End Doc Library

484
Altoids-PowerSupply/Altoids-PowerSupply-cache.lib Normal file
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EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# AP2127K-3.3TRG1
#
DEF AP2127K-3.3TRG1 U 0 40 Y Y 1 F N
F0 "U" 0 -200 79 H V C CNN
F1 "AP2127K-3.3TRG1" 0 250 79 H V C CNN
F2 "" -100 0 79 H I C CNN
F3 "" -100 0 79 H I C CNN
DRAW
S -250 150 250 -150 0 1 0 N
X VIN 1 -450 100 200 R 50 50 1 1 I
X GND 2 -450 0 200 R 50 50 1 1 I
X ~SHTDWN 3 -450 -100 200 R 50 50 1 1 I
X NC 4 450 0 200 L 50 50 1 1 N
X VOUT 5 450 100 200 L 50 50 1 1 w
ENDDRAW
ENDDEF
#
# ATTINY25-20SU
#
DEF ATTINY25-20SU U 0 40 Y Y 1 F N
F0 "U" -1150 400 50 H V C CNN
F1 "ATTINY25-20SU" 1000 -400 50 H V C CNN
F2 "Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm" 950 0 50 H I C CIN
F3 "" 0 0 50 H I C CNN
ALIAS ATTINY45-20SU ATTINY85-20SU
DRAW
S -1200 350 1200 -350 0 1 10 f
X PB5(~RESET~/dW/ADC0/PCINT5) 1 -1350 -250 150 R 40 40 1 1 B
X PB3(XTAL1/CLKI/~OC1B~/ADC3/PCINT3) 2 -1350 -50 150 R 40 40 1 1 B
X PB4(XTAL2/CLKO/OC1B/ADC2/PCINT4) 3 -1350 -150 150 R 40 40 1 1 B
X GND 4 1350 -250 150 L 40 40 1 1 W
X PB0(MOSI/DI/SDA/AIN0/OC0A/~OC1A~/AREF/PCINT0) 5 -1350 250 150 R 40 40 1 1 B
X PB1(MISO/DO/AIN1/OC0B/OC1A/PCINT1) 6 -1350 150 150 R 40 40 1 1 B
X PB2(SCK/USCK/SCL/T0/INT0/ADC1/PCINT2) 7 -1350 50 150 R 40 40 1 1 B
X VCC 8 1350 250 150 L 40 40 1 1 W
ENDDRAW
ENDDEF
#
# BQ24230
#
DEF BQ24230 U 0 40 Y Y 1 F N
F0 "U" 0 -900 49 H V C CNN
F1 "BQ24230" 0 100 49 H V C CNN
F2 "" -100 0 49 H I C CNN
F3 "" -100 0 49 H I C CNN
DRAW
S -300 50 300 -850 0 1 0 N
X TS 1 -500 -100 200 R 50 50 1 1 I
X BAT 2 500 0 200 L 50 50 1 1 I
X BAT 3 500 -100 200 L 50 50 1 1 I
X ~CE 4 -500 -200 200 R 50 50 1 1 I
X EN2 5 -500 -300 200 R 50 50 1 1 I
X EN1 6 -500 -400 200 R 50 50 1 1 I
X ~PGOOD 7 500 -800 200 L 50 50 1 1 O
X VSS 8 500 -400 200 L 50 50 1 1 I
X ~CHG 9 500 -700 200 L 50 50 1 1 O
X OUT 10 500 -200 200 L 50 50 1 1 I
X OUT 11 500 -300 200 L 50 50 1 1 I
X ILIM 12 -500 -500 200 R 50 50 1 1 I
X IN 13 -500 0 200 R 50 50 1 1 I
X TMR 14 -500 -600 200 R 50 50 1 1 I
X ITERM 15 -500 -700 200 R 50 50 1 1 I
X ISET 16 -500 -800 200 R 50 50 1 1 I
X PAD 17 500 -500 200 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
# C
#
DEF C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "C" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Conn_01x02
#
DEF Conn_01x02 J 0 40 Y N 1 F N
F0 "J" 0 100 50 H V C CNN
F1 "Conn_01x02" 0 -200 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_??x*mm*
Connector*:*1x??x*mm*
Pin?Header?Straight?1X*
Pin?Header?Angled?1X*
Socket?Strip?Straight?1X*
Socket?Strip?Angled?1X*
$ENDFPLIST
DRAW
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 50 50 -150 1 1 10 f
X Pin_1 1 -200 0 150 R 50 50 1 1 P
X Pin_2 2 -200 -100 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Conn_01x04_Female
#
DEF Conn_01x04_Female J 0 40 Y N 1 F N
F0 "J" 0 200 50 H V C CNN
F1 "Conn_01x04_Female" 0 -300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_??x*mm*
Connector*:*1x??x*mm*
Socket?Strip?Straight?1X*
Socket?Strip?Angled?1X*
$ENDFPLIST
DRAW
A 0 -200 20 901 -901 1 1 6 N 0 -180 0 -220
A 0 -100 20 901 -901 1 1 6 N 0 -80 0 -120
A 0 0 20 901 -901 1 1 6 N 0 20 0 -20
A 0 100 20 901 -901 1 1 6 N 0 120 0 80
P 2 1 1 6 -50 -200 -20 -200 N
P 2 1 1 6 -50 -100 -20 -100 N
P 2 1 1 6 -50 0 -20 0 N
P 2 1 1 6 -50 100 -20 100 N
X Pin_1 1 -200 100 150 R 50 50 1 1 P
X Pin_2 2 -200 0 150 R 50 50 1 1 P
X Pin_3 3 -200 -100 150 R 50 50 1 1 P
X Pin_4 4 -200 -200 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Conn_01x04_Male
#
DEF Conn_01x04_Male J 0 40 Y N 1 F N
F0 "J" 0 200 50 H V C CNN
F1 "Conn_01x04_Male" 0 -300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_??x*mm*
Connector*:*1x??x*mm*
Pin?Header?Straight?1X*
Pin?Header?Angled?1X*
$ENDFPLIST
DRAW
S 34 -195 0 -205 1 1 6 F
S 34 -95 0 -105 1 1 6 F
S 34 5 0 -5 1 1 6 F
S 34 105 0 95 1 1 6 F
P 2 1 1 6 50 -200 34 -200 N
P 2 1 1 6 50 -100 34 -100 N
P 2 1 1 6 50 0 34 0 N
P 2 1 1 6 50 100 34 100 N
X Pin_1 1 200 100 150 L 50 50 1 1 P
X Pin_2 2 200 0 150 L 50 50 1 1 P
X Pin_3 3 200 -100 150 L 50 50 1 1 P
X Pin_4 4 200 -200 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Conn_01x06
#
DEF Conn_01x06 J 0 40 Y N 1 F N
F0 "J" 0 300 50 H V C CNN
F1 "Conn_01x06" 0 -400 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_??x*mm*
Connector*:*1x??x*mm*
Pin?Header?Straight?1X*
Pin?Header?Angled?1X*
Socket?Strip?Straight?1X*
Socket?Strip?Angled?1X*
$ENDFPLIST
DRAW
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 250 50 -350 1 1 10 f
X Pin_1 1 -200 200 150 R 50 50 1 1 P
X Pin_2 2 -200 100 150 R 50 50 1 1 P
X Pin_3 3 -200 0 150 R 50 50 1 1 P
X Pin_4 4 -200 -100 150 R 50 50 1 1 P
X Pin_5 5 -200 -200 150 R 50 50 1 1 P
X Pin_6 6 -200 -300 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# D
#
DEF D D 0 40 N N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "D" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
TO-???*
*SingleDiode
*_Diode_*
*SingleDiode*
D_*
$ENDFPLIST
DRAW
P 2 0 1 8 -50 50 -50 -50 N
P 2 0 1 0 50 0 -50 0 N
P 4 0 1 8 50 50 50 -50 -50 0 50 50 N
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Earth
#
DEF ~Earth #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "Earth" 0 -150 50 H I C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -25 -75 25 -75 N
P 2 0 1 0 -5 -100 5 -100 N
P 2 0 1 0 0 -50 0 0 N
P 2 0 1 0 50 -50 -50 -50 N
X Earth 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# GND
#
DEF GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# GNDA
#
DEF GNDA #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "GNDA" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GNDA 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# KeyElco-1043P
#
DEF KeyElco-1043P U 0 40 Y Y 1 F N
F0 "U" -100 -150 49 H V C CNN
F1 "KeyElco-1043P" -50 150 49 H V C CNN
F2 "" 0 0 49 H I C CNN
F3 "" 0 0 49 H I C CNN
DRAW
S -200 100 0 -100 0 1 0 N
X BT+ 1 200 50 200 L 50 50 1 1 I
X BT- 2 200 -50 200 L 50 50 1 1 I
ENDDRAW
ENDDEF
#
# L
#
DEF L L 0 40 N N 1 F N
F0 "L" -50 0 50 V V C CNN
F1 "L" 75 0 50 V V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Choke_*
*Coil*
Inductor_*
L_*
$ENDFPLIST
DRAW
A 0 -75 25 -899 899 0 1 0 N 0 -100 0 -50
A 0 -25 25 -899 899 0 1 0 N 0 -50 0 0
A 0 25 25 -899 899 0 1 0 N 0 0 0 50
A 0 75 25 -899 899 0 1 0 N 0 50 0 100
X 1 1 0 150 50 D 50 50 1 1 P
X 2 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# LED
#
DEF LED D 0 40 Y N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "LED" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
LED*
$ENDFPLIST
DRAW
P 2 0 1 8 -50 -50 -50 50 N
P 2 0 1 0 -50 0 50 0 N
P 4 0 1 8 50 -50 50 50 -50 0 50 -50 N
P 5 0 1 0 -120 -30 -180 -90 -150 -90 -180 -90 -180 -60 N
P 5 0 1 0 -70 -30 -130 -90 -100 -90 -130 -90 -130 -60 N
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# MC34063
#
DEF MC34063 U 0 40 Y Y 1 F N
F0 "U" 0 -250 60 H V C CNN
F1 "MC34063" 0 250 60 H V C CNN
F2 "" 0 100 60 H I C CNN
F3 "" 0 100 60 H I C CNN
DRAW
S 300 200 -300 -200 0 1 0 N
X SW_C 1 500 150 200 L 50 50 1 1 I
X SW_E 2 500 50 200 L 50 50 1 1 I
X Ct 3 500 -50 200 L 50 50 1 1 I
X GND 4 500 -150 200 L 50 50 1 1 I
X C_INV 5 -500 -150 200 R 50 50 1 1 I
X VCC 6 -500 -50 200 R 50 50 1 1 I
X I_Sense 7 -500 50 200 R 50 50 1 1 I
X DRV_C 8 -500 150 200 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# Q_PMOS_GDS
#
DEF Q_PMOS_GDS Q 0 0 Y N 1 F N
F0 "Q" 200 50 50 H V L CNN
F1 "Q_PMOS_GDS" 200 -50 50 H V L CNN
F2 "" 200 100 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C 65 0 111 0 1 10 N
C 100 -70 11 0 1 0 F
C 100 70 11 0 1 0 F
P 2 0 1 0 2 0 10 0 N
P 2 0 1 0 30 -70 100 -70 N
P 2 0 1 10 30 -50 30 -90 N
P 2 0 1 0 30 0 100 0 N
P 2 0 1 10 30 20 30 -20 N
P 2 0 1 0 30 70 100 70 N
P 2 0 1 10 30 90 30 50 N
P 2 0 1 0 100 -70 100 -100 N
P 2 0 1 0 100 -70 100 0 N
P 2 0 1 0 100 100 100 70 N
P 3 0 1 10 10 75 10 -75 10 -75 N
P 4 0 1 0 90 0 50 -15 50 15 90 0 F
P 4 0 1 0 100 -70 130 -70 130 70 100 70 N
P 4 0 1 0 110 -20 115 -15 145 -15 150 -10 N
P 4 0 1 0 130 -15 115 10 145 10 130 -15 N
X G 1 -200 0 200 R 50 50 1 1 I
X D 2 100 200 100 D 50 50 1 1 P
X S 3 100 -200 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# R
#
DEF R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "R" 0 0 50 V V C CNN
F2 "" -70 0 50 V I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
R_*
R_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# SW_DIP_x01
#
DEF SW_DIP_x01 SW 0 0 Y N 1 F N
F0 "SW" 0 150 50 H V C CNN
F1 "SW_DIP_x01" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
SW?DIP?x1*
$ENDFPLIST
DRAW
C -80 0 20 0 0 0 N
C 80 0 20 0 0 0 N
P 2 0 0 0 -60 5 93 46 N
S -150 100 150 -100 0 1 10 f
X ~ 1 -300 0 200 R 50 50 1 1 P
X ~ 2 300 0 200 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# USB_A
#
DEF USB_A J 0 40 Y Y 1 F N
F0 "J" -200 450 50 H V L CNN
F1 "USB_A" -200 350 50 H V L CNN
F2 "" 150 -50 50 H I C CNN
F3 "" 150 -50 50 H I C CNN
$FPLIST
USB*
$ENDFPLIST
DRAW
C -150 85 25 0 1 10 F
C -25 135 15 0 1 10 F
S -200 -300 200 300 0 1 10 f
S -60 190 -170 210 0 1 0 F
S -50 180 -180 230 0 1 0 N
S -5 -300 5 -270 0 1 0 N
S 10 50 -20 20 0 1 10 F
S 200 -105 170 -95 0 1 0 N
S 200 -5 170 5 0 1 0 N
S 200 195 170 205 0 1 0 N
P 4 0 1 10 -125 85 -100 85 -50 135 -25 135 N
P 4 0 1 10 -100 85 -75 85 -50 35 0 35 N
P 4 0 1 10 25 110 25 60 75 85 25 110 F
P 2 1 1 10 -75 85 25 85 N
X VBUS 1 300 200 100 L 50 50 1 1 W
X D- 2 300 -100 100 L 50 50 1 1 P
X D+ 3 300 0 100 L 50 50 1 1 P
X GND 4 0 -400 100 U 50 50 1 1 W
X Shield 5 -100 -400 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# USB_OTG
#
DEF USB_OTG J 0 40 Y Y 1 F N
F0 "J" -200 450 50 H V L CNN
F1 "USB_OTG" -200 350 50 H V L CNN
F2 "" 150 -50 50 H I C CNN
F3 "" 150 -50 50 H I C CNN
$FPLIST
USB*
$ENDFPLIST
DRAW
C -150 85 25 0 1 10 F
C -25 135 15 0 1 10 F
S -200 -300 200 300 0 1 10 f
S -5 -300 5 -270 0 1 0 N
S 10 50 -20 20 0 1 10 F
S 200 -205 170 -195 0 1 0 N
S 200 -105 170 -95 0 1 0 N
S 200 -5 170 5 0 1 0 N
S 200 195 170 205 0 1 0 N
P 2 0 1 10 -75 85 25 85 N
P 4 0 1 10 -125 85 -100 85 -50 135 -25 135 N
P 4 0 1 10 -100 85 -75 85 -50 35 0 35 N
P 4 0 1 10 25 110 25 60 75 85 25 110 F
P 5 0 1 0 -170 220 -70 220 -80 190 -160 190 -170 220 F
P 9 0 1 0 -185 230 -185 220 -175 190 -175 180 -65 180 -65 190 -55 220 -55 230 -185 230 N
X VBUS 1 300 200 100 L 50 50 1 1 W
X D- 2 300 -100 100 L 50 50 1 1 P
X D+ 3 300 0 100 L 50 50 1 1 P
X ID 4 300 -200 100 L 50 50 1 1 P
X GND 5 0 -400 100 U 50 50 1 1 W
X Shield 6 -100 -400 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
#End Library

141
Altoids-PowerSupply/Altoids-PowerSupply.kicad_pcb Normal file
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(kicad_pcb (version 4) (host pcbnew 4.0.7)
(general
(links 0)
(no_connects 0)
(area 85.899999 41.899999 197.35 109.200001)
(thickness 1.6)
(drawings 10)
(tracks 0)
(zones 0)
(modules 0)
(nets 1)
)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
(last_trace_width 0.25)
(trace_clearance 0.2)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.2)
(segment_width 0.2)
(edge_width 0.2)
(via_size 0.6)
(via_drill 0.4)
(via_min_size 0.4)
(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.2)
(aux_axis_origin 0 0)
(visible_elements 7FFFFFFF)
(pcbplotparams
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(plotframeref false)
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(hpglpennumber 1)
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(hpglpenoverlay 2)
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(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net_class Default "This is the default net class."
(clearance 0.2)
(trace_width 0.25)
(via_dia 0.6)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net "Net-(BT1-Pad1)")
(add_net "Net-(BT1-Pad2)")
(add_net "Net-(BT1-Pad3)")
(add_net "Net-(BT1-Pad4)")
)
(dimension 56 (width 0.3) (layer F.Fab)
(gr_text "56.000 mm" (at 190.85 70 270) (layer F.Fab)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 162 98) (xy 192.2 98)))
(feature2 (pts (xy 162 42) (xy 192.2 42)))
(crossbar (pts (xy 189.5 42) (xy 189.5 98)))
(arrow1a (pts (xy 189.5 98) (xy 188.913579 96.873496)))
(arrow1b (pts (xy 189.5 98) (xy 190.086421 96.873496)))
(arrow2a (pts (xy 189.5 42) (xy 188.913579 43.126504)))
(arrow2b (pts (xy 189.5 42) (xy 190.086421 43.126504)))
)
(dimension 90.5 (width 0.3) (layer F.Fab)
(gr_text "90.500 mm" (at 131.25 107.85) (layer F.Fab)
(effects (font (size 1.5 1.5) (thickness 0.3)))
)
(feature1 (pts (xy 176.5 83.5) (xy 176.5 109.2)))
(feature2 (pts (xy 86 83.5) (xy 86 109.2)))
(crossbar (pts (xy 86 106.5) (xy 176.5 106.5)))
(arrow1a (pts (xy 176.5 106.5) (xy 175.373496 107.086421)))
(arrow1b (pts (xy 176.5 106.5) (xy 175.373496 105.913579)))
(arrow2a (pts (xy 86 106.5) (xy 87.126504 107.086421)))
(arrow2b (pts (xy 86 106.5) (xy 87.126504 105.913579)))
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(gr_line (start 100 98) (end 162.5 98) (layer Edge.Cuts) (width 0.2))
(gr_line (start 86 56) (end 86 84) (layer Edge.Cuts) (width 0.2))
(gr_line (start 176.5 56) (end 176.5 84) (layer Edge.Cuts) (width 0.2))
(gr_line (start 100 42) (end 162.5 42) (layer Edge.Cuts) (width 0.2))
(gr_arc (start 100 84) (end 100 98) (angle 90) (layer Edge.Cuts) (width 0.2) (tstamp 5A01FC69))
(gr_arc (start 162.5 84) (end 176.5 84) (angle 89.9) (layer Edge.Cuts) (width 0.2) (tstamp 5A01FC68))
(gr_arc (start 162.5 56) (end 162.5 42) (angle 90) (layer Edge.Cuts) (width 0.2))
(gr_arc (start 100 56) (end 86 56) (angle 89.9) (layer Edge.Cuts) (width 0.2))
)

45
Altoids-PowerSupply/Altoids-PowerSupply.net Normal file
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(export (version D)
(design
(source C:/Users/David/Documents/kicad-projects/Altoids-PowerSupply/Altoids-PowerSupply.sch)
(date "2017-11-07 12:16:28 PM")
(tool "Eeschema 4.0.7")
(sheet (number 1) (name /) (tstamps /)
(title_block
(title)
(company)
(rev)
(date)
(source Altoids-PowerSupply.sch)
(comment (number 1) (value ""))
(comment (number 2) (value ""))
(comment (number 3) (value ""))
(comment (number 4) (value "")))))
(components
(comp (ref BT1)
(value BattHold-2X18650-1049)
(footprint cust_footprints:BattHolder-1049)
(libsource (lib batthold-2x18650-1049) (part BattHold-2X18650-1049))
(sheetpath (names /) (tstamps /))
(tstamp 5A01FFDD)))
(libparts
(libpart (lib batthold-2x18650-1049) (part BattHold-2X18650-1049)
(fields
(field (name Reference) BT)
(field (name Value) BattHold-2X18650-1049))
(pins
(pin (num 1) (name BT1+) (type power_out))
(pin (num 2) (name BT1-) (type power_out))
(pin (num 3) (name BT2+) (type power_out))
(pin (num 4) (name BT2-) (type power_out)))))
(libraries
(library (logical batthold-2x18650-1049)
(uri C:\Users\David\Documents\kicad-projects\Custom-Parts\batthold-2x18650-1049.lib)))
(nets
(net (code 1) (name "Net-(BT1-Pad1)")
(node (ref BT1) (pin 1)))
(net (code 2) (name "Net-(BT1-Pad2)")
(node (ref BT1) (pin 2)))
(net (code 3) (name "Net-(BT1-Pad3)")
(node (ref BT1) (pin 3)))
(net (code 4) (name "Net-(BT1-Pad4)")
(node (ref BT1) (pin 4)))))

64
Altoids-PowerSupply/Altoids-PowerSupply.pro Normal file
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update=2017-11-07 11:47:35 AM
version=1
last_client=kicad
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[general]
version=1
[eeschema]
version=1
LibDir=
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=switches
LibName4=relays
LibName5=motors
LibName6=transistors
LibName7=conn
LibName8=linear
LibName9=regul
LibName10=74xx
LibName11=cmos4000
LibName12=adc-dac
LibName13=memory
LibName14=xilinx
LibName15=microcontrollers
LibName16=dsp
LibName17=microchip
LibName18=analog_switches
LibName19=motorola
LibName20=texas
LibName21=intel
LibName22=audio
LibName23=interface
LibName24=digital-audio
LibName25=philips
LibName26=display
LibName27=cypress
LibName28=siliconi
LibName29=opto
LibName30=atmel
LibName31=contrib
LibName32=valves
LibName33=C:/Users/David/Documents/kicad-projects/Custom-Parts/batthold-2x18650-1049

1359
Altoids-PowerSupply/Altoids-PowerSupply.sch Normal file
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21
Altoids-PowerSupply/cust_footprints.pretty/BattHolder-1049.kicad_mod Normal file
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(module BattHolder-1049 (layer F.Cu) (tedit 5A020422)
(fp_text reference REF** (at 0 30.7) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value BattHolder-1049 (at 0 -9) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 38.6 29.45) (end 38.6 -10.35) (layer F.Fab) (width 0.15))
(fp_line (start -38.6 29.45) (end 38.6 29.45) (layer F.Fab) (width 0.15))
(fp_line (start -38.6 -10.35) (end -38.6 29.45) (layer F.Fab) (width 0.15))
(fp_line (start 38.6 -10.35) (end -38.6 -10.35) (layer F.Fab) (width 0.15))
(pad 1 thru_hole circle (at -36.11 0) (size 2.38 2.38) (drill 1.32) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 36.11 0) (size 2.38 2.38) (drill 1.32) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at 36.11 19.13) (size 2.38 2.38) (drill 1.32) (layers *.Cu *.Mask))
(pad 4 thru_hole circle (at -36.11 19.13) (size 2.38 2.38) (drill 1.32) (layers *.Cu *.Mask))
(pad ~ thru_hole circle (at 27.6 9.55) (size 3.55 3.55) (drill 3.55) (layers *.Cu *.Mask))
(pad ~ thru_hole circle (at -27.6 9.55) (size 3.55 3.55) (drill 3.55) (layers *.Cu *.Mask))
(pad ~ thru_hole circle (at -27.6 27.05) (size 3.55 3.55) (drill 3.55) (layers *.Cu *.Mask))
(pad ~ thru_hole circle (at 27.6 -7.95) (size 3.55 3.55) (drill 3.55) (layers *.Cu *.Mask))
(pad ~ thru_hole circle (at 36.11 27.05) (size 2.38 2.38) (drill 2.38) (layers *.Cu *.Mask))
)

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Altoids-PowerSupply/cust_footprints.pretty/KeyElco-1043P.kicad_mod Normal file
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(module KeyElco-1043P (layer F.Cu) (tedit 5A15D06A)
(fp_text reference REF** (at 0 9) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value KeyElco-1043P (at 0 -11) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user 18650 (at 0 0) (layer F.SilkS)
(effects (font (size 2 2) (thickness 0.15)))
)
(fp_text user - (at -35 -8) (layer F.SilkS)
(effects (font (size 3 3) (thickness 0.15)))
)
(fp_text user + (at 36 -8) (layer F.SilkS)
(effects (font (size 3 3) (thickness 0.15)))
)
(fp_line (start -38.75 10.325) (end -38.75 -10.35) (layer F.SilkS) (width 0.15))
(fp_line (start 38.75 10.325) (end -38.75 10.325) (layer F.SilkS) (width 0.15))
(fp_line (start 38.75 -10.325) (end 38.75 10.325) (layer F.SilkS) (width 0.15))
(fp_line (start -38.75 -10.35) (end 38.75 -10.325) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole circle (at 36.11 0) (size 2 2) (drill 1.32) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at -36.11 0) (size 2 2) (drill 1.32) (layers *.Cu *.Mask))
(pad ~ thru_hole circle (at 27.6 -8) (size 3.55 3.55) (drill 3.55) (layers *.Cu *.Mask))
(pad ~ thru_hole circle (at -27.6 8) (size 3.55 3.55) (drill 3.55) (layers *.Cu *.Mask))
(pad 3 thru_hole circle (at 36.11 8) (size 2.39 2.39) (drill 2.39) (layers *.Cu *.Mask))
)

31
Altoids-PowerSupply/cust_footprints.pretty/QFN16-Pad.kicad_mod Normal file
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(module QFN16-Pad (layer F.Cu) (tedit 5A1710E3)
(fp_text reference REF** (at 0 3) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value QFN16-Pad (at 0 -3) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.75 1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.15))
(fp_line (start -1.45 -1.45) (end -1.45 0.75) (layer F.SilkS) (width 0.15))
(fp_line (start -1.45 0.75) (end -0.75 1.45) (layer F.SilkS) (width 0.15))
(fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.15))
(fp_line (start -1.45 -1.45) (end 1.45 -1.45) (layer F.SilkS) (width 0.15))
(pad "" np_thru_hole rect (at 0 0) (size 1.68 1.68) (drill 0.2) (layers *.Cu *.Mask)
(zone_connect 2))
(pad 1 smd rect (at -1.4 -0.75) (size 0.6 0.24) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -1.4 -0.25) (size 0.6 0.24) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -1.4 0.25) (size 0.6 0.24) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -1.4 0.75) (size 0.6 0.24) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -0.75 1.4 90) (size 0.6 0.24) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at -0.25 1.4 90) (size 0.6 0.24) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at 0.25 1.4 90) (size 0.6 0.24) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at 0.75 1.4 90) (size 0.6 0.24) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at 1.4 0.75) (size 0.6 0.24) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at 1.4 0.25) (size 0.6 0.24) (layers F.Cu F.Paste F.Mask))
(pad 11 smd rect (at 1.4 -0.25) (size 0.6 0.24) (layers F.Cu F.Paste F.Mask))
(pad 12 smd rect (at 1.4 -0.75) (size 0.6 0.24) (layers F.Cu F.Paste F.Mask))
(pad 13 smd rect (at 0.75 -1.4 90) (size 0.6 0.24) (layers F.Cu F.Paste F.Mask))
(pad 14 smd rect (at 0.25 -1.4 90) (size 0.6 0.24) (layers F.Cu F.Paste F.Mask))
(pad 15 smd rect (at -0.25 -1.4 90) (size 0.6 0.24) (layers F.Cu F.Paste F.Mask))
(pad 16 smd rect (at -0.75 -1.4 90) (size 0.6 0.24) (layers F.Cu F.Paste F.Mask))
)

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Altoids-PowerSupply/fp-lib-table Normal file
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(fp_lib_table
(lib (name cust_footprints)(type KiCad)(uri "$(KIPRJMOD)/cust_footprints.pretty")(options "")(descr ""))
)

3
Custom-Parts/batthold-2x18650-1049.dcm Normal file
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EESchema-DOCLIB Version 2.0
#
#End Doc Library

20
Custom-Parts/batthold-2x18650-1049.lib Normal file
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EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# BattHold-2X18650-1049
#
DEF BattHold-2X18650-1049 BT 0 40 Y Y 1 F N
F0 "BT" 0 -250 60 H V C CNN
F1 "BattHold-2X18650-1049" 0 300 60 H V C CNN
F2 "" -100 150 60 H I C CNN
F3 "" -100 150 60 H I C CNN
DRAW
S -150 200 150 -200 0 1 0 N
X BT1+ 1 350 150 200 L 50 50 1 1 w
X BT1- 2 350 50 200 L 50 50 1 1 w
X BT2+ 3 350 -50 200 L 50 50 1 1 w
X BT2- 4 350 -150 200 L 50 50 1 1 w
ENDDRAW
ENDDEF
#
#End Library