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fw: moving forward a bit

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This commit is contained in:
David Lenfesty 2023-03-05 11:48:08 -07:00
parent cc763a3e9b
commit 6ef410786e
5 changed files with 39 additions and 15 deletions
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2
firmware/build.rs
View File

@ -11,4 +11,4 @@ fn main() {
println!("cargo:rerun-if-changed=memory.x"); println!("cargo:rerun-if-changed=memory.x");
println!("cargo:rerun-if-changed=build.rs"); println!("cargo:rerun-if-changed=build.rs");
} }

4
firmware/build_and_strip.sh Executable file
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@ -0,0 +1,4 @@
#!/usr/bin/sh
cargo build --release
riscv64-unknown-elf-objcopy -S -O binary target/riscv32i-unknown-none-elf/release/fw fw.bin

17
firmware/openocd.cfg Normal file
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@ -0,0 +1,17 @@
set _CHIPNAME riscv
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x21000000
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
#flash bank spi0 fespi 0x40000000 0 0 0 $_TARGETNAME.0 0x20004000
init
if {[ info exists pulse_srst]} {
ftdi_set_signal nSRST 0
ftdi_set_signal nSRST z
}
halt
#flash protect 0 64 last off
echo "Ready for Remote Connections"

16
firmware/src/eth.rs
View File

@ -1,7 +1,6 @@
//! Quick and hacky ethernet thing to test //! Quick and hacky ethernet thing to test
const LITEETH_BASE: u32 = 0x0050_0000; const LITEETH_BASE: u32 = 0x0200_0000;
const ETHMAC_SRAM_WRITER_EV_PENDING: u32 = LITEETH_BASE + 0x810; const ETHMAC_SRAM_WRITER_EV_PENDING: u32 = LITEETH_BASE + 0x810;
const ETHMAC_SRAM_WRITER_EV_ENABLE: u32 = LITEETH_BASE + 0x814; const ETHMAC_SRAM_WRITER_EV_ENABLE: u32 = LITEETH_BASE + 0x814;
@ -9,12 +8,16 @@ const ETHMAC_SRAM_READER_EV_PENDING: u32 = LITEETH_BASE + 0x830;
const ETHMAC_SRAM_READER_EV_ENABLE: u32 = LITEETH_BASE + 0x834; const ETHMAC_SRAM_READER_EV_ENABLE: u32 = LITEETH_BASE + 0x834;
fn write_u32_reg(addr: u32, value: u32) { fn write_u32_reg(addr: u32, value: u32) {
unsafe { *(addr as *mut u32) = value; } use core::ptr::write;
unsafe {
write(addr as *mut u32, value);
}
} }
fn read_u32_reg(addr: u32) -> u32 { fn read_u32_reg(addr: u32) -> u32 {
use core::ptr::read;
unsafe { unsafe {
return *(addr as *mut u32); return read(addr as *mut u32);
} }
} }
@ -35,7 +38,4 @@ pub fn init() {
write_u32_reg(ETHMAC_SRAM_READER_EV_ENABLE, 0); write_u32_reg(ETHMAC_SRAM_READER_EV_ENABLE, 0);
} }
pub fn tranmsit() { pub fn tranmsit() {}
}

15
firmware/src/main.rs
View File

@ -21,13 +21,12 @@ fn main() -> ! {
500_000 500_000
}; };
// do something here // do something here
loop { loop {
unsafe { unsafe {
write(0x01002000 as *mut u32, 0); write_led(0);
busy_wait(blink_period); busy_wait(blink_period);
write(0x01002000 as *mut u32, 1); write_led(1);
busy_wait(blink_period); busy_wait(blink_period);
} }
} }
@ -35,10 +34,14 @@ fn main() -> ! {
fn busy_wait(num_nops: u32) { fn busy_wait(num_nops: u32) {
for _ in 0..num_nops { for _ in 0..num_nops {
unsafe { asm!("nop"); } unsafe {
asm!("nop");
}
} }
} }
fn write_led(val: u32) { fn write_led(val: u32) {
unsafe { write(0x01002000 as *mut u32, val); } unsafe {
} write(0x01002000 as *mut u32, val);
}
}