david/new-sonar
1
0
Fork 0
Code Issues 11 Pull Requests Projects Releases Wiki Activity

gateware: propogate MDIO signal correctly w/o IOBUF

Browse Source 
This was causing my nextpnr crash. I really do need to figure out how to
do this in a less hacky way. Or even just make it more explicit that I
am doing this for a reason.
This commit is contained in:
David Lenfesty 2023-03-04 12:41:16 -07:00
parent 6e89c0d837
commit 8b19464608
2 changed files with 6 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
gateware/eth.py
View File

@ -40,7 +40,8 @@ class LiteEth(Elaboratable, Interface):
i_rgmii_eth_clocks_rx=self.eth_interface.rx_clk,
o_rgmii_eth_rst_n=self.eth_interface.rst,
i_rgmii_eth_int_n=Const(1),
i_rgmii_eth_mdio=self.eth_interface.mdio,
# TODO actually fix the platform to support this problem.
#i_rgmii_eth_mdio=self.eth_interface.mdio,
o_rgmii_eth_mdc=self.eth_interface.mdc,
i_rgmii_eth_rx_ctl=self.eth_interface.rx_ctl,
i_rgmii_eth_rx_data=self.eth_interface.rx_data,

6
gateware/main.py
View File

@ -129,7 +129,7 @@ class Core(Elaboratable):
# Ethernet
self.eth = LiteEth(self.eth_interface)
m.submodules.eth = self.eth
start, _stop, _step = self.decoder.add(self.eth)
start, _stop, _step = self.decoder.add(self.eth, addr=0x00500000)
print(f"LiteETH added at 0x{start:08x}")
# Connect arbiter to decoder
@ -187,7 +187,9 @@ if __name__ == "__main__":
args = args.parse_args()
if args.build:
colorlight_i9.Colorlight_i9_Platform().build(SoC(), debug_verilog=args.gen_debug_verilog)
# Overrides are available via AMARANTH_<override_variable_name> env variable, or kwarg
# TODO fix platform so I don't have to manually specify MDIO signal
colorlight_i9.Colorlight_i9_Platform().build(SoC(), debug_verilog=args.gen_debug_verilog, nextpnr_opts="--router router1", add_preferences="LOCATE COMP \"top.eth.core.rgmii_eth_mdio\" SITE \"P5\";\n")
if args.test:
if args.save_vcd: