Update to KiCAD 7 and fix most issues

This commit is contained in:
David Lenfesty 2023-05-07 10:41:31 -06:00
parent 40b88557d8
commit b330e5c447
12 changed files with 17749 additions and 23195 deletions

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@ -1,5 +1,6 @@
{
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"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.09999999999999999,
@ -64,20 +65,26 @@
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"lib_footprint_issues": "warning",
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
@ -87,9 +94,14 @@
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_edge_clearance": "warning",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"solder_mask_bridge": "error",
"starved_thermal": "error",
"text_height": "warning",
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
@ -98,7 +110,6 @@
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rules": {
@ -106,23 +117,69 @@
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.0,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_resolved_spokes": 2,
"min_silk_clearance": 0.0,
"min_text_height": 0.7999999999999999,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0,
"solder_mask_to_copper_clearance": 0.0,
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},
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"td_curve_segcount": 5,
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"td_ontrackend": false,
"td_onviapad": true
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@ -135,7 +192,8 @@
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@ -319,18 +377,23 @@
"rule_severities": {
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"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
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"conflicting_netclasses": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"endpoint_off_grid": "warning",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
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"lib_symbol_issues": "warning",
"missing_bidi_pin": "warning",
"missing_input_pin": "warning",
"missing_power_pin": "error",
"missing_unit": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
@ -340,6 +403,7 @@
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"simulation_model_issue": "error",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
@ -357,7 +421,7 @@
"net_settings": {
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@ -371,10 +435,10 @@
"track_width": 0.0889,
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},
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@ -383,36 +447,85 @@
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Ethernet",
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"/ETH_TRX1_N",
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"/ETH_TRX3_N",
"/ETH_TRX3_P",
"/ETH_TRX4_N",
"/ETH_TRX4_P",
"/Ethernet/ETH_PA+",
"/Ethernet/ETH_PA-",
"/Ethernet/ETH_PB+",
"/Ethernet/ETH_PB-",
"/Ethernet/ETH_PC+",
"/Ethernet/ETH_PC-",
"/Ethernet/ETH_PD+",
"/Ethernet/ETH_PD-"
],
"pcb_color": "rgb(0, 0, 255)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
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"via_diameter": 0.8,
"via_drill": 0.4,
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"meta": {
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},
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"net_colors": null,
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},
{
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},
{
"netclass": "Ethernet",
"pattern": "/ETH_TRX2_N"
},
{
"netclass": "Ethernet",
"pattern": "/ETH_TRX2_P"
},
{
"netclass": "Ethernet",
"pattern": "/ETH_TRX3_N"
},
{
"netclass": "Ethernet",
"pattern": "/ETH_TRX3_P"
},
{
"netclass": "Ethernet",
"pattern": "/ETH_TRX4_N"
},
{
"netclass": "Ethernet",
"pattern": "/ETH_TRX4_P"
},
{
"netclass": "Ethernet",
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},
{
"netclass": "Ethernet",
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},
{
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},
{
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},
{
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{
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{
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{
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@ -428,6 +541,8 @@
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"field_names": [],
@ -459,7 +574,11 @@
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_current_sheet_as_root": false,
"spice_external_command": "spice \"%I\"",
"spice_model_current_sheet_as_root": true,
"spice_save_all_currents": false,
"spice_save_all_voltages": false,
"subpart_first_id": 65,
"subpart_id_separator": 0
},

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@ -1,4 +1,4 @@
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View File

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