diff --git a/gateware/main.py b/gateware/main.py
index 0a7ea6b..7916ccd 100644
--- a/gateware/main.py
+++ b/gateware/main.py
@@ -122,7 +122,7 @@ class Core(Elaboratable):
         fw = load_firmware_for_mem()
 
         # Hook up memory space
-        self.rom = ROM(size_bytes=8192, data=fw)
+        self.rom = ROM(size_bytes=12288, data=fw)
         m.submodules.rom = self.rom
         # Problem: not sure to handle how we do byte vs word addressing properly
         # So doing this shift is a bit of a hacky way to impl anything