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Add debug access to Minerva core #18

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opened 2023-01-22 21:17:44 -07:00 by david · 2 comments
david commented 2023-01-22 21:17:44 -07:00
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This should essentially just be enabling it as an option in the instantiation and hooking up the JTAG signals.

This should essentially just be enabling it as an option in the instantiation and hooking up the JTAG signals.
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david commented 2023-03-05 13:04:17 -07:00
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Unfortunately, it relies on jtagtap, which is written for nmigen.

To do this, I'll need to port it to amaranth. Shouldn't be a huge amount of work, but I also want to push it upstream, and it's more than what it should be.

Unfortunately, it relies on [jtagtap](https://github.com/lambdaconcept/jtagtap), which is written for nmigen. To do this, I'll need to port it to amaranth. Shouldn't be a huge amount of work, but I also want to push it upstream, and it's more than what it should be.
david added this to the Functional MVP milestone 2023-03-05 13:11:47 -07:00
david commented 2023-06-03 11:54:46 -06:00
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Moved to LiteX, so using vexriscv. Could add a debug port I think, but I'm past bringup hell anyways, and I have defmt for nice tracing, so will ignore.

Moved to LiteX, so using vexriscv. Could add a debug port I think, but I'm past bringup hell anyways, and I have defmt for nice tracing, so will ignore.
david closed this issue 2023-06-03 11:54:46 -06:00
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Reference: david/new-sonar#18
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