# Manufacturing specs

Designed for JLC7628 stackup.

# Revision Notes

## Revision A

- Missing silkscreen labels for debug headers and UART headers
- Pogo pins not *quite* centered.
- Pogo pins should export 4 parts, not 1.
- Power regulator and ADC should be moved to underside of board to avoid potential mechanical conflicts.
- Ethernet magnetics footprint is incorrect (too slim).
- Should have some way to provide power for standalone debugging (USB?)
- I2C should have DNP pullup resistor footprints
- Reset and/or power button would be nice
- Pads on DDR connector could be thinned slightly
- VREF is floating on ADCs
- led is on same FPGA pin as ADC1 refclk (U16)
- Need to figure out the pin length for mounting the board directly to preprocessor