new-sonar/firmware/src/main.rs

94 lines
2.4 KiB
Rust

#![no_std]
#![no_main]
extern crate panic_halt;
use core::{arch::asm, ptr::{write_volatile, read_volatile}};
use core::fmt::Write;
use embedded_hal::prelude::{_embedded_hal_blocking_i2c_Write, _embedded_hal_blocking_i2c_Read};
use mcp4726::Status;
use riscv_rt::entry;
mod eth;
mod i2c;
mod uart;
mod mcp4726;
// use `main` as the entry point of this application
// `main` is not allowed to return
#[entry]
fn main() -> ! {
//unsafe { eth::init(); }
//let blink_period = unsafe {
// if eth::is_wishbone_correct() {
// 10_000_000
// } else {
// 500_000
// }
//};
let blink_period = 10_000_000u32;
let mut uart = uart::AmlibUart::new(0x0200_0040);
// Configure DAC
let mut i2c = i2c::AmlibI2c::new(0x0200_0000);
//let mut buf = [0u8; 1];
//i2c.read(0b110_0011, &mut buf);
let mut buf = [0u8; 8];
i2c.read(0x63, &mut buf[0..4]).unwrap();
writeln!(uart, "DAC Read before config: {:x}, {:x}, {:x}, {:x}", buf[0], buf[1], buf[2], buf[3]).unwrap();
let mut dac = mcp4726::MCP4726::new(3);
writeln!(uart, "Reading DAC status").unwrap();
match dac.read_status(&mut i2c) {
Ok(status) => writeln!(uart, "Is ready? {}, device powered? {}", status.ready, status.device_powered).unwrap(),
Err(e) => {
writeln!(uart, "Error: {:?}", e).unwrap();
panic!();
}
}
writeln!(uart, "Configuring DAC").unwrap();
dac.write_config(&mut i2c, mcp4726::Config {
vref_source: mcp4726::VRef::UnbufferedVDD,
operation: mcp4726::PowerDown::NormalOperation,
use_2x_gain: false,
}).unwrap();
writeln!(uart, "Setting DAC").unwrap();
dac.write_dac(&mut i2c, 0x0800).unwrap();
i2c.read(0x63, &mut buf[0..4]).unwrap();
writeln!(uart, "DAC Read after config: {:x}, {:x}, {:x}, {:x}", buf[0], buf[1], buf[2], buf[3]).unwrap();
loop {
//eth::tranmsit();
//writeln!(uart, "Hello world!");
write_led(0);
busy_wait(blink_period);
write_led(1);
busy_wait(blink_period);
}
}
fn busy_wait(num_nops: u32) {
for _ in 0..num_nops {
unsafe {
asm!("nop");
}
}
}
fn write_led(val: u32) {
unsafe { write_reg(0x01003000, val); }
}
unsafe fn write_reg<T>(addr: u32, value: T) {
write_volatile(addr as *mut T, value);
}
unsafe fn read_reg<T>(addr: u32) -> T {
return read_volatile(addr as *mut T);
}