66 lines
1.3 KiB
Rust
66 lines
1.3 KiB
Rust
#![no_std]
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#![no_main]
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extern crate panic_halt;
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use core::{arch::asm, ptr::{write, read}};
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use core::fmt::Write;
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use embedded_hal::prelude::_embedded_hal_blocking_i2c_Write;
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use riscv_rt::entry;
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mod eth;
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mod i2c;
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mod uart;
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// use `main` as the entry point of this application
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// `main` is not allowed to return
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#[entry]
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fn main() -> ! {
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//unsafe { eth::init(); }
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//let blink_period = unsafe {
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// if eth::is_wishbone_correct() {
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// 10_000_000
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// } else {
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// 500_000
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// }
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//};
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let blink_period = 10_000_000u32;
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//let mut i2c = i2c::AmlibI2c::new(0x0200_0000);
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//let data = [0u8, 2u8];
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//i2c.write(0xAA, &data).unwrap();
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let mut uart = uart::AmlibUart::new(0x0200_0040);
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loop {
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//eth::tranmsit();
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uart.write_str("Hello world!\r\n");
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write_led(0);
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busy_wait(blink_period);
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write_led(1);
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busy_wait(blink_period);
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}
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}
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fn busy_wait(num_nops: u32) {
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for _ in 0..num_nops {
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unsafe {
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asm!("nop");
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}
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}
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}
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fn write_led(val: u32) {
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unsafe { write_reg(0x01003000, val); }
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}
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unsafe fn write_reg<T>(addr: u32, value: T) {
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write(addr as *mut T, value);
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}
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unsafe fn read_reg<T>(addr: u32) -> T {
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return read(addr as *mut T);
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}
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