381 lines
15 KiB
ReStructuredText
381 lines
15 KiB
ReStructuredText
ETHMAC
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======
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Register Listing for ETHMAC
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---------------------------
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+--------------------------------------------------------------------------------+--------------------------------------------------------+
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| Register | Address |
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+================================================================================+========================================================+
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| :ref:`ETHMAC_SRAM_WRITER_SLOT <ETHMAC_SRAM_WRITER_SLOT>` | :ref:`0x00000800 <ETHMAC_SRAM_WRITER_SLOT>` |
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+--------------------------------------------------------------------------------+--------------------------------------------------------+
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| :ref:`ETHMAC_SRAM_WRITER_LENGTH <ETHMAC_SRAM_WRITER_LENGTH>` | :ref:`0x00000804 <ETHMAC_SRAM_WRITER_LENGTH>` |
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+--------------------------------------------------------------------------------+--------------------------------------------------------+
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| :ref:`ETHMAC_SRAM_WRITER_ERRORS <ETHMAC_SRAM_WRITER_ERRORS>` | :ref:`0x00000808 <ETHMAC_SRAM_WRITER_ERRORS>` |
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+--------------------------------------------------------------------------------+--------------------------------------------------------+
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| :ref:`ETHMAC_SRAM_WRITER_EV_STATUS <ETHMAC_SRAM_WRITER_EV_STATUS>` | :ref:`0x0000080c <ETHMAC_SRAM_WRITER_EV_STATUS>` |
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+--------------------------------------------------------------------------------+--------------------------------------------------------+
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| :ref:`ETHMAC_SRAM_WRITER_EV_PENDING <ETHMAC_SRAM_WRITER_EV_PENDING>` | :ref:`0x00000810 <ETHMAC_SRAM_WRITER_EV_PENDING>` |
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+--------------------------------------------------------------------------------+--------------------------------------------------------+
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| :ref:`ETHMAC_SRAM_WRITER_EV_ENABLE <ETHMAC_SRAM_WRITER_EV_ENABLE>` | :ref:`0x00000814 <ETHMAC_SRAM_WRITER_EV_ENABLE>` |
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+--------------------------------------------------------------------------------+--------------------------------------------------------+
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| :ref:`ETHMAC_SRAM_READER_START <ETHMAC_SRAM_READER_START>` | :ref:`0x00000818 <ETHMAC_SRAM_READER_START>` |
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+--------------------------------------------------------------------------------+--------------------------------------------------------+
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| :ref:`ETHMAC_SRAM_READER_READY <ETHMAC_SRAM_READER_READY>` | :ref:`0x0000081c <ETHMAC_SRAM_READER_READY>` |
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+--------------------------------------------------------------------------------+--------------------------------------------------------+
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| :ref:`ETHMAC_SRAM_READER_LEVEL <ETHMAC_SRAM_READER_LEVEL>` | :ref:`0x00000820 <ETHMAC_SRAM_READER_LEVEL>` |
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+--------------------------------------------------------------------------------+--------------------------------------------------------+
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| :ref:`ETHMAC_SRAM_READER_SLOT <ETHMAC_SRAM_READER_SLOT>` | :ref:`0x00000824 <ETHMAC_SRAM_READER_SLOT>` |
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+--------------------------------------------------------------------------------+--------------------------------------------------------+
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| :ref:`ETHMAC_SRAM_READER_LENGTH <ETHMAC_SRAM_READER_LENGTH>` | :ref:`0x00000828 <ETHMAC_SRAM_READER_LENGTH>` |
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+--------------------------------------------------------------------------------+--------------------------------------------------------+
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| :ref:`ETHMAC_SRAM_READER_EV_STATUS <ETHMAC_SRAM_READER_EV_STATUS>` | :ref:`0x0000082c <ETHMAC_SRAM_READER_EV_STATUS>` |
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+--------------------------------------------------------------------------------+--------------------------------------------------------+
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| :ref:`ETHMAC_SRAM_READER_EV_PENDING <ETHMAC_SRAM_READER_EV_PENDING>` | :ref:`0x00000830 <ETHMAC_SRAM_READER_EV_PENDING>` |
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+--------------------------------------------------------------------------------+--------------------------------------------------------+
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| :ref:`ETHMAC_SRAM_READER_EV_ENABLE <ETHMAC_SRAM_READER_EV_ENABLE>` | :ref:`0x00000834 <ETHMAC_SRAM_READER_EV_ENABLE>` |
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+--------------------------------------------------------------------------------+--------------------------------------------------------+
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| :ref:`ETHMAC_PREAMBLE_CRC <ETHMAC_PREAMBLE_CRC>` | :ref:`0x00000838 <ETHMAC_PREAMBLE_CRC>` |
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+--------------------------------------------------------------------------------+--------------------------------------------------------+
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| :ref:`ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS <ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS>` | :ref:`0x0000083c <ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS>` |
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+--------------------------------------------------------------------------------+--------------------------------------------------------+
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| :ref:`ETHMAC_RX_DATAPATH_CRC_ERRORS <ETHMAC_RX_DATAPATH_CRC_ERRORS>` | :ref:`0x00000840 <ETHMAC_RX_DATAPATH_CRC_ERRORS>` |
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+--------------------------------------------------------------------------------+--------------------------------------------------------+
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ETHMAC_SRAM_WRITER_SLOT
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^^^^^^^^^^^^^^^^^^^^^^^
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`Address: 0x00000800 + 0x0 = 0x00000800`
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.. wavedrom::
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:caption: ETHMAC_SRAM_WRITER_SLOT
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{
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"reg": [
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{"name": "sram_writer_slot", "bits": 1},
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{"bits": 31},
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], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
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}
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ETHMAC_SRAM_WRITER_LENGTH
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^^^^^^^^^^^^^^^^^^^^^^^^^
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`Address: 0x00000800 + 0x4 = 0x00000804`
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.. wavedrom::
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:caption: ETHMAC_SRAM_WRITER_LENGTH
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{
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"reg": [
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{"name": "sram_writer_length[10:0]", "bits": 11},
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{"bits": 21},
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], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
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}
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ETHMAC_SRAM_WRITER_ERRORS
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^^^^^^^^^^^^^^^^^^^^^^^^^
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`Address: 0x00000800 + 0x8 = 0x00000808`
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.. wavedrom::
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:caption: ETHMAC_SRAM_WRITER_ERRORS
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{
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"reg": [
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{"name": "sram_writer_errors[31:0]", "bits": 32}
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], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
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}
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ETHMAC_SRAM_WRITER_EV_STATUS
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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`Address: 0x00000800 + 0xc = 0x0000080c`
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This register contains the current raw level of the available event trigger.
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Writes to this register have no effect.
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.. wavedrom::
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:caption: ETHMAC_SRAM_WRITER_EV_STATUS
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{
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"reg": [
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{"name": "available", "bits": 1},
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{"bits": 31}
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], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
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}
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+-------+-----------+----------------------------------+
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| Field | Name | Description |
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+=======+===========+==================================+
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| [0] | AVAILABLE | Level of the ``available`` event |
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+-------+-----------+----------------------------------+
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ETHMAC_SRAM_WRITER_EV_PENDING
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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`Address: 0x00000800 + 0x10 = 0x00000810`
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When a available event occurs, the corresponding bit will be set in this
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register. To clear the Event, set the corresponding bit in this register.
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.. wavedrom::
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:caption: ETHMAC_SRAM_WRITER_EV_PENDING
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{
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"reg": [
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{"name": "available", "bits": 1},
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{"bits": 31}
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], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
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}
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+-------+-----------+---------------------------------------------------------------------------------+
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| Field | Name | Description |
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+=======+===========+=================================================================================+
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| [0] | AVAILABLE | `1` if a `available` event occurred. This Event is **level triggered** when the |
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| | | signal is **high**. |
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+-------+-----------+---------------------------------------------------------------------------------+
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ETHMAC_SRAM_WRITER_EV_ENABLE
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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`Address: 0x00000800 + 0x14 = 0x00000814`
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This register enables the corresponding available events. Write a ``0`` to this
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register to disable individual events.
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.. wavedrom::
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:caption: ETHMAC_SRAM_WRITER_EV_ENABLE
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{
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"reg": [
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{"name": "available", "bits": 1},
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{"bits": 31}
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], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
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}
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+-------+-----------+-------------------------------------------------+
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| Field | Name | Description |
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+=======+===========+=================================================+
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| [0] | AVAILABLE | Write a ``1`` to enable the ``available`` Event |
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+-------+-----------+-------------------------------------------------+
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ETHMAC_SRAM_READER_START
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^^^^^^^^^^^^^^^^^^^^^^^^
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`Address: 0x00000800 + 0x18 = 0x00000818`
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.. wavedrom::
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:caption: ETHMAC_SRAM_READER_START
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{
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"reg": [
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{"name": "sram_reader_start", "bits": 1},
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{"bits": 31},
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], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
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}
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ETHMAC_SRAM_READER_READY
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^^^^^^^^^^^^^^^^^^^^^^^^
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`Address: 0x00000800 + 0x1c = 0x0000081c`
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.. wavedrom::
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:caption: ETHMAC_SRAM_READER_READY
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{
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"reg": [
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{"name": "sram_reader_ready", "bits": 1},
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{"bits": 31},
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], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
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}
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ETHMAC_SRAM_READER_LEVEL
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^^^^^^^^^^^^^^^^^^^^^^^^
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`Address: 0x00000800 + 0x20 = 0x00000820`
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.. wavedrom::
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:caption: ETHMAC_SRAM_READER_LEVEL
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{
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"reg": [
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{"name": "sram_reader_level[1:0]", "bits": 2},
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{"bits": 30},
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], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
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}
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ETHMAC_SRAM_READER_SLOT
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^^^^^^^^^^^^^^^^^^^^^^^
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`Address: 0x00000800 + 0x24 = 0x00000824`
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.. wavedrom::
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:caption: ETHMAC_SRAM_READER_SLOT
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{
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"reg": [
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{"name": "sram_reader_slot", "bits": 1},
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{"bits": 31},
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], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
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}
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ETHMAC_SRAM_READER_LENGTH
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^^^^^^^^^^^^^^^^^^^^^^^^^
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`Address: 0x00000800 + 0x28 = 0x00000828`
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.. wavedrom::
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:caption: ETHMAC_SRAM_READER_LENGTH
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{
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"reg": [
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{"name": "sram_reader_length[10:0]", "bits": 11},
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{"bits": 21},
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], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
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}
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ETHMAC_SRAM_READER_EV_STATUS
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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`Address: 0x00000800 + 0x2c = 0x0000082c`
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This register contains the current raw level of the event0 event trigger.
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Writes to this register have no effect.
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.. wavedrom::
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:caption: ETHMAC_SRAM_READER_EV_STATUS
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{
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"reg": [
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{"name": "event0", "bits": 1},
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{"bits": 31}
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], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
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}
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+-------+--------+-------------------------------+
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| Field | Name | Description |
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+=======+========+===============================+
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| [0] | EVENT0 | Level of the ``event0`` event |
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+-------+--------+-------------------------------+
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ETHMAC_SRAM_READER_EV_PENDING
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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`Address: 0x00000800 + 0x30 = 0x00000830`
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When a event0 event occurs, the corresponding bit will be set in this register.
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To clear the Event, set the corresponding bit in this register.
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.. wavedrom::
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:caption: ETHMAC_SRAM_READER_EV_PENDING
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{
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"reg": [
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{"name": "event0", "bits": 1},
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{"bits": 31}
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], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
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}
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+-------+--------+----------------------------------------------------------------------------------+
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| Field | Name | Description |
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+=======+========+==================================================================================+
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| [0] | EVENT0 | `1` if a this particular event occurred. This Event is triggered on a **rising** |
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| | | edge. |
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+-------+--------+----------------------------------------------------------------------------------+
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ETHMAC_SRAM_READER_EV_ENABLE
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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`Address: 0x00000800 + 0x34 = 0x00000834`
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This register enables the corresponding event0 events. Write a ``0`` to this
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register to disable individual events.
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.. wavedrom::
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:caption: ETHMAC_SRAM_READER_EV_ENABLE
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{
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"reg": [
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{"name": "event0", "bits": 1},
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{"bits": 31}
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], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
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}
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+-------+--------+----------------------------------------------+
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| Field | Name | Description |
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+=======+========+==============================================+
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| [0] | EVENT0 | Write a ``1`` to enable the ``event0`` Event |
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+-------+--------+----------------------------------------------+
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ETHMAC_PREAMBLE_CRC
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^^^^^^^^^^^^^^^^^^^
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`Address: 0x00000800 + 0x38 = 0x00000838`
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.. wavedrom::
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:caption: ETHMAC_PREAMBLE_CRC
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{
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"reg": [
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{"name": "preamble_crc", "attr": 'reset: 1', "bits": 1},
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{"bits": 31},
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], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
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}
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ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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`Address: 0x00000800 + 0x3c = 0x0000083c`
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.. wavedrom::
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:caption: ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS
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{
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"reg": [
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{"name": "rx_datapath_preamble_errors[31:0]", "bits": 32}
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], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
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}
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ETHMAC_RX_DATAPATH_CRC_ERRORS
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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`Address: 0x00000800 + 0x40 = 0x00000840`
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.. wavedrom::
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:caption: ETHMAC_RX_DATAPATH_CRC_ERRORS
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{
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"reg": [
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{"name": "rx_datapath_crc_errors[31:0]", "bits": 32}
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], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
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}
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