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gw: add ADC2-4 pinouts and update changed pins

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This commit is contained in:
David Lenfesty 2023-05-27 13:30:01 -06:00
parent 8e6e483f92
commit aebb3a58f0
1 changed files with 37 additions and 8 deletions
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45
gateware/platforms/sonar.py
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@ -19,7 +19,7 @@ from litex.build.lattice.programmer import EcpDapProgrammer
# IOs ---------------------------------------------------------------------------------------------- # IOs ----------------------------------------------------------------------------------------------
_io_v7_0 = [ # Documented by @smunaut _io_v7_0 = [ # Colorlight i9 documented by @smunaut
# Clk # Clk
("clk25", 0, Pins("P3"), IOStandard("LVCMOS33")), ("clk25", 0, Pins("P3"), IOStandard("LVCMOS33")),
@ -117,13 +117,42 @@ _io_v7_0 = [ # Documented by @smunaut
# High speed parallel ADCs # High speed parallel ADCs
("adc", 0, ("adc", 0,
Subsignal("data", Pins("M18 N18 N17 P18 U17 U18 T17 M17 P17 R17")), # Rev A pins
# TODO ???? what other pins are changed in 7.2 #Subsignal("data", Pins("M18 N18 N17 P18 U17 U18 T17 M17 P17 R17")),
Subsignal("refclk", Pins("L2")), # Rev B pins
Subsignal("oen_b", Pins("K18")), Subsignal("data", Pins("L20 M18 N18 N17 P18 U17 U18 T17 M17 P17")),
Subsignal("standby", Pins("C18")), Subsignal("refclk", Pins("K18")),
Subsignal("dfs", Pins("T18")), Subsignal("oen_b", Pins("C18")),
Subsignal("otr", Pins("R18")), Subsignal("standby", Pins("T18")),
Subsignal("dfs", Pins("R18")),
Subsignal("otr", Pins("R17")),
IOStandard("LVCMOS33")
),
("adc", 1,
Subsignal("data", Pins("R1 T1 U1 Y2 W1 V1 M1 N2 N3 T2")),
Subsignal("refclk", Pins("M4")),
Subsignal("oen_b", Pins("N4")),
Subsignal("standby", Pins("R3")),
Subsignal("dfs", Pins("T3")),
Subsignal("otr", Pins("M3")),
IOStandard("LVCMOS33")
),
("adc", 2,
Subsignal("data", Pins("A18 C17 A19 B18 B19 B20 C20 D19 D20 E19")),
Subsignal("refclk", Pins("J19")),
Subsignal("oen_b", Pins("H20")),
Subsignal("standby", Pins("G20")),
Subsignal("dfs", Pins("G19")),
Subsignal("otr", Pins("F20")),
IOStandard("LVCMOS33")
),
("adc", 3,
Subsignal("data", Pins("E4 F1 F3 G3 H3 H4 H5 J4 J5 K3")),
Subsignal("refclk", Pins("M4")),
Subsignal("oen_b", Pins("N4")),
Subsignal("standby", Pins("B3")),
Subsignal("dfs", Pins("K5")),
Subsignal("otr", Pins("K4")),
IOStandard("LVCMOS33") IOStandard("LVCMOS33")
), ),
] ]