Updated Sonar System

Will not be doing LVDS system, because arty doesn't have selectable bank voltage to actually use it.

Switching to use Colorlight i9 board (ECP5 UP5K 45), because it has plenty IO broken out, also provides ethernet (I just need to implement the magnetics and jack), and is cheaper/potentially easier to acquire for ARVP in the future. The LiteX implementation fits in <40% of total resources of the 25K LUT variant, so the 45K should be plenty for what I need. Frankly what I'm implementing is very simple. It can probably even handle doing the FFT on board if I wanted to.

Repo Layout

hardware/ - Directory for any hardware designs
  pmod/ - A PMOD interface board, using 4 ADCs with LVDS converters to get data across PMOD [Failed Idea]
  sonar_symbols.kicad_sym - custom KiCAD symbols I create for hardware

Design Goals

4x 20MSPS channels @ > 8 bits
Ethernet data channel
Simplified software stack (or at least fewer layers of components)
Well-documented

System Architecture

┌─────────────┐
│Main Computer│
└─────▲───────┘
      │
      │
      │
┌─────┴──────┐
│Ethernet PHY│
│      ▲     │           Interface Board (x4)
│      │     │       ┌──────────────────────────────┐
│      │     │       │                              │            ┌─────────────┐
│      │     │◄──────┤ LVDS Serializer◄─────────ADC │◄───────────┤ Hydrophones │
│      │     │       │                              │            └─────────────┘
│      │     │       └──────────────────────────────┘
│    FPGA    │
└─────▲──────┘
      │ Dev Board
      │ or
      │ Custom Board
      │
      │
      │
   ┌──┴───────────────────┐
   │ Peak Detector Board  │
   └──────────────────────┘
               (Temporary)

RTL Architecture

Diagram TODO

The plan is to use LiteX and let it do most of the heavy lifting. Components to generate:

Softcore (some RISC-V core)
Main memory bus
DMA engine
Gigabit Ethernet MAC

THis way the only actual RTL to write is the peripheral that interacts with the ADCs, which should be very simple. To do early bringup I can start with a blinky peripheral to demonstrate access to the bus, and then I can keep adding functionality.

Software Planning

Will try to use embassy on RISC-V if I can.

Should make sure to have a debug port available as early as possible.

I will make the interface as generic as possible, so it should be easy to swap out, but I will start by targetting zmq so I can change as little of the software stack as possible.

Random issues

You will probably need to un write-protect the flash

ecpdap: "Error: specified probe not found"

A Reboot fixed it....

Do I have ecpdap installed in two places and one of them doesn't work maybe?

I do have two versions installed. one from oss-cad-suite and one by building it manually.

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