new-sonar/hardware/colorlight-base
2023-06-17 15:56:29 +00:00
..
gerbers hw: fix DRC issues, export Rev B 2023-05-07 10:48:03 -06:00
adc.kicad_sch Update to KiCAD 7 and fix most issues 2023-05-07 10:41:40 -06:00
bom.ini hw: create KiBOM config 2023-05-07 10:39:18 -06:00
colorlight-base.kicad_pcb hw: fix silkscreen issue 2023-06-17 15:56:29 +00:00
colorlight-base.kicad_pro hw: fix DRC issues, export Rev B 2023-05-07 10:48:03 -06:00
colorlight-base.kicad_sch Update to KiCAD 7 and fix most issues 2023-05-07 10:41:40 -06:00
dac.kicad_sch Update to KiCAD 7 and fix most issues 2023-05-07 10:41:40 -06:00
debug.kicad_sch Update to KiCAD 7 and fix most issues 2023-05-07 10:41:40 -06:00
ethernet.kicad_sch Update to KiCAD 7 and fix most issues 2023-05-07 10:41:40 -06:00
external_connections.kicad_sch Update to KiCAD 7 and fix most issues 2023-05-07 10:41:40 -06:00
fp-lib-table hardware: check in colorlight-base design 2023-01-23 22:01:37 -07:00
power.kicad_sch Update to KiCAD 7 and fix most issues 2023-05-07 10:41:40 -06:00
README.md hw: update README for new revision 2023-05-07 10:54:09 -06:00
revision_notes.md hw: added some notes on RevA bringup issues 2023-03-05 11:52:41 -07:00
sampling.kicad_sch hardware: check in colorlight-base design 2023-01-23 22:01:37 -07:00
sym-lib-table hardware: check in colorlight-base design 2023-01-23 22:01:37 -07:00

Building this board

BOM can be generated using KiBOM (configuration is tracked in git, so you just need to use it). The version on PyPI may be out of date, so either install manually or with the following git command:

pip install git+https://github.com/SchrodingersGAT/KiBoM

Then you can create new generator, using the following CLI:

"/usr/bin/python3" "-m" "kibom" "%I" "%O"

The "prototype" variant can be specified, and that will remove the ADCs from the BOM.

For manufacturing, use the most recent ZIP file of gerbers in the gerbers/ folder.

Manufacturing specs

Designed for JLC7628 stackup.

Revision Notes

Revision A

Initial revision, used for prototype and initial bringup.

Issues being addressed

  • Missing silkscreen labels for debug headers and UART headers
  • Pogo pins should export 4 parts, not 1.
  • Power regulator and ADC should be moved to underside of board to avoid potential mechanical conflicts.
  • Ethernet magnetics footprint is incorrect (too slim).
  • I2C should have DNP pullup resistor footprints
  • Pads on DDR connector could be thinned slightly
  • led is on same FPGA pin as ADC1 refclk (U16)
  • Need to figure out the pin length for mounting the board directly to preprocessor

Issues not being addressed

  • Should have some way to provide power for standalone debugging (not doing)
  • Reset and/or power button would be nice (not doing)
  • Pogo pins not quite centered.
  • VREF is floating on ADCs

Revision B

Intended to be the final revision. Fixes all known major issues with revision A, improves silkscreen and BOM generation.