Still a few base instructions to go, but those are waiting on the privileged implementation. My game plan: - implement privileged spec (M-only), adding way to handle traps - finish implementing last of the base instructions - add in exceptions that have been ignored in all instructions - clean up main memory interface, mmaybe add some caching, at least some instruction cache.
4 lines
90 B
Plaintext
4 lines
90 B
Plaintext
[submodule "riscv-tests"]
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path = riscv-tests
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url = git@github.com:riscv/riscv-tests.git
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