David Lenfesty
e850430a8c
Still a few base instructions to go, but those are waiting on the privileged implementation. My game plan: - implement privileged spec (M-only), adding way to handle traps - finish implementing last of the base instructions - add in exceptions that have been ignored in all instructions - clean up main memory interface, mmaybe add some caching, at least some instruction cache.
79 lines
3.2 KiB
Python
79 lines
3.2 KiB
Python
from nmigen import *
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from opcodes import Opcodes
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class InstructionDecoder(Elaboratable):
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def __init__(self):
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#### Input
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self.instr = Signal(unsigned(32))
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#### Output
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self.opcode = Signal(Opcodes)
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self.funct3 = Signal(unsigned(3))
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self.funct7 = Signal(unsigned(7))
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self.imm = Signal(32)
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self.immu = Signal(unsigned(32))
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# Register selection
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self.src1 = Signal(unsigned(5))
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self.src2 = Signal(unsigned(5))
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self.dest = Signal(unsigned(5))
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self.base = Signal(unsigned(5))
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def ports(self) -> tuple:
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return (self.instr, self.opcode, self.funct3, self.imm, self.immu, self.src1, self.dest, self.base)
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def elaborate(self, platform):
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m = Module()
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m.d.comb += self.opcode.eq(self.instr[0:6])
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# Default immediate to 0 whenever we can
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m.d.comb += self.imm.eq(0)
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m.d.comb += self.immu.eq(0)
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m.d.comb += self.dest.eq(self.instr[7:11]) # TODO will likely move back into the switch
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with m.Switch(self.opcode):
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# I-Type Instructions
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with m.Case(Opcodes.OP_IMM, Opcodes.JALR, Opcodes.LOAD, Opcodes.MISC_MEM):
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# TODO does this sign-extend?
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m.d.comb += self.imm.eq(self.instr[20:31].as_signed())
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m.d.comb += self.immu.eq(self.instr[20:31])
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m.d.comb += self.funct3.eq(self.instr[12:14])
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m.d.comb += self.src1.eq(self.instr[15:19])
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# U-Type Instructions
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with m.Case(Opcodes.LUI, Opcodes.AUIPC):
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m.d.comb += self.imm[12:31].eq(self.instr[12:31].as_signed())
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m.d.comb += self.immu[12:31].eq(self.instr[12:31])
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# R-Type Instructions
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with m.Case(Opcodes.OP):
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m.d.comb += self.funct3.eq(self.instr[12:14])
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m.d.comb += self.funct7.eq(self.instr[25:31])
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m.d.comb += self.src1.eq(self.instr[15:19])
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m.d.comb += self.src2.eq(self.instr[20:24])
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# J-Type Instructions
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with m.Case(Opcodes.JAL):
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imm = Cat(Const(0, shape=1), self.instr[21:30], self.instr[20], self.instr[12:19], self.instr[31])
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m.d.comb += self.imm.eq(imm.as_signed())
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m.d.comb += self.immu.eq(imm.as_unsigned())
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# B-Type Instructions
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with m.Case(Opcodes.BRANCH):
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imm = Cat(Const(0, shape=1), self.instr[8:11], self.instr[25:30], self.instr[7], self.instr[31])
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m.d.comb += self.imm.eq(imm.as_signed())
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m.d.comb += self.immu.eq(imm.as_unsigned())
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m.d.comb += self.funct3.eq(self.instr[12:14])
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m.d.comb += self.src1.eq(self.instr[15:19])
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m.d.comb += self.src2.eq(self.instr[20:24])
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# S-Type Instructions
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with m.Case(Opcodes.STORE):
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m.d.comb += self.funct3.eq(self.instr[12:14])
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m.d.comb += self.base.eq(self.instr[15:19])
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m.d.comb += self.src1.eq(self.instr[20:24])
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m.d.comb += self.imm.eq(Cat(self.instr[7:11], self.instr[25:31]).as_signed())
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m.d.comb += self.immu.eq(Cat(self.instr[7:11], self.instr[25:31]).as_unsigned())
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return m
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