gateware: saving some state again

gateware/docs/sampler_clock_design.md

@@ -0,0 +1,40 @@
+# Sampler clock design and CDC considerations
+
+Essentially, I have to support two clock domains, one for the ADC sampling
+itself and one for system clock, otherwise we'll have issues pushing the
+bandwidth we need to export the data.
+
+Sampling speed will be 10MHz, as limited by memory resources. Ideally the system
+clock will be 50MHz, but 40MHz is a decent minimum IMO.
+
+The sampler module itself will operate on system clock, with a wishbone
+interface. It will pass the sample clock into smaller sub-modules that read the
+data from the ADCs. (TODO I need to figure out how to deal with how exactly to
+sample the data pins relative to the clock, make sure the signal is stable when
+I clock it in. Maybe do negative edge? Idk.)
+
+- Control signals to the ADC (DFS, 3-STATE, REFSENSE), will be directly wired to
+  control registers.
+- STBY will be controlled by the sampler module
+- OTR will be synchronized in to sysclk with n-FF, it is clocked to 10MHz domain
+
+An enable signal will be synchronized in to the sample clock domain, and that
+will be used by the sampler submodules to pull STBY high, and begin sampling.
+The sampling submodules will be very dumb, and export the data as determined by
+the enable signal, (i.e. wait 5 clocks to start/stop to manage ADC pipeline
+latency).
+
+The data will be synchronized straight through, data connected comb, and a
+toggled pin to synchronize the data into sysclk. We can export at full speed if
+we latch data in on a change in the toggle pin instead of setting high and
+waiting for it to go low.  (Otherwise we need to implement some sort of gearing
+to push multiple samples through every few sample clocks.) This is okay for CDC
+because sysclk is faster than sample clock, so any transition will last long
+enough to propogate through the synchronizers, and when we get a change through
+the synchronyzer, we can know that the data is valid. This assumes sysclk is at
+least 4x faster than the sample clock, so the toggle pin can propogate through
+the synchronizer, and the data is still valid before the next sample clock edge.
+
+On the sysclk side, the toggle will turn into a strobe and data will feed into
+circular buffers to store the ping data. It will also be exported to the peak
+detector module.

gateware/eth.py

@@ -1,27 +1,72 @@
 from amaranth import *
+from amaranth.lib.io import pin_layout
 from amaranth_soc.wishbone.bus import Interface
 
+
+__all__ = ["LiteEth", "rgmii_layout"]
+
+
 # TODO maybe this should just call liteeth_gen to close the loop?
 class LiteEth(Elaboratable, Interface):
     def __init__(self):
 
-        # TODO change ADDR width
-        Interface.__init__(self, addr_width=32, data_width=32)
+        # Addr width is 13 bits to accomodate 0x1FFF, which is well p
+        Interface.__init__(self, addr_width=13, data_width=32, granularity=8, features=["cti", "bte", "err"])
 
         self.rgmii_eth_clocks_tx = Signal()
 
+        self.interrupt = Signal()
 
+
+    # TODO this really shouldn't technically happen here, because we can elaborate one module multiple times,
+    # but since I use it once it isn't actually a problem.
     def elaborate(self, platform):
         platform.add_file("liteeth_core.v", open("liteeth/gateware/liteeth_core.v", 'r').read())
 
         m = Module()
 
+
+        # TODO I have to provide TX/RX clocks myself
         core = Instance(
             "liteeth_core",
             i_sys_clock=ClockSignal(),
+
+            # RGMII signals
             o_rgmii_eth_clocks_tx=self.rgmii_eth_clocks_tx,
+
+            # Wishbone all the things
+            i_wishbone_adr=self.adr,
+            i_wishbone_dat_w=self.dat_w,
+            o_wishbone_dat_r=self.dat_r,
+            i_wishbone_sel=self.sel,
+            i_wishbone_cyc=self.cyc,
+            o_wishbone_ack=self.ack,
+            i_wishbone_we=self.we,
+            i_wishbone_cti=self.cti,
+            i_wishbone_bte=self.bte,
+            o_wishbone_err=self.err,
+
+            o_interrupt=self.interrupt,
         )
 
         m.submodules.core = core
 
         return m
+
+
+rgmii_layout = [
+    ("clocks_tx", pin_layout(1, "o")),
+    ("clocks_rx", pin_layout(1, "i")),
+    ("rst_n", pin_layout(1, "o")),
+    ("int_n", pin_layout(1, "i")),
+
+    # TODO is this not IO? why does LiteEth say input?
+    # I think the answer is it uses a primitive, not 100% right now
+    ("mdio", pin_layout(1, "i")),
+    ("mdc", pin_layout(1, "o")),
+    ("rx_ctl", pin_layout(1, "i")),
+    ("rx_data", pin_layout(4, "i")),
+    ("tx_ctl", pin_layout(1, "o")),
+    ("tx_data", pin_layout(4, "o")),
+]
+

gateware/gen_liteeth.sh

@@ -1,3 +1,3 @@
 #!/usr/bin/env sh
 
-liteeth_gen --output-dir liteeth  liteeth_config.yaml
+liteeth_gen --output-dir liteeth --doc liteeth_config.yaml

gateware/liteeth/csr.csv

@@ -0,0 +1,45 @@
+#--------------------------------------------------------------------------------
+# Auto-generated by LiteX (8159b5ca) on 2023-02-07 21:33:18
+#--------------------------------------------------------------------------------
+csr_base,ctrl,0x00000000,,
+csr_base,ethmac,0x00000800,,
+csr_base,ethphy,0x00001000,,
+csr_register,ctrl_reset,0x00000000,1,rw
+csr_register,ctrl_scratch,0x00000004,1,rw
+csr_register,ctrl_bus_errors,0x00000008,1,ro
+csr_register,ethmac_sram_writer_slot,0x00000800,1,ro
+csr_register,ethmac_sram_writer_length,0x00000804,1,ro
+csr_register,ethmac_sram_writer_errors,0x00000808,1,ro
+csr_register,ethmac_sram_writer_ev_status,0x0000080c,1,ro
+csr_register,ethmac_sram_writer_ev_pending,0x00000810,1,rw
+csr_register,ethmac_sram_writer_ev_enable,0x00000814,1,rw
+csr_register,ethmac_sram_reader_start,0x00000818,1,rw
+csr_register,ethmac_sram_reader_ready,0x0000081c,1,ro
+csr_register,ethmac_sram_reader_level,0x00000820,1,ro
+csr_register,ethmac_sram_reader_slot,0x00000824,1,rw
+csr_register,ethmac_sram_reader_length,0x00000828,1,rw
+csr_register,ethmac_sram_reader_ev_status,0x0000082c,1,ro
+csr_register,ethmac_sram_reader_ev_pending,0x00000830,1,rw
+csr_register,ethmac_sram_reader_ev_enable,0x00000834,1,rw
+csr_register,ethmac_preamble_crc,0x00000838,1,ro
+csr_register,ethmac_rx_datapath_preamble_errors,0x0000083c,1,ro
+csr_register,ethmac_rx_datapath_crc_errors,0x00000840,1,ro
+csr_register,ethphy_crg_reset,0x00001000,1,rw
+csr_register,ethphy_rx_inband_status,0x00001004,1,ro
+csr_register,ethphy_mdio_w,0x00001008,1,rw
+csr_register,ethphy_mdio_r,0x0000100c,1,ro
+constant,config_clock_frequency,10000000,,
+constant,config_cpu_type_none,None,,
+constant,config_cpu_variant_standard,None,,
+constant,config_cpu_human_name,unknown,,
+constant,config_csr_data_width,32,,
+constant,config_csr_alignment,32,,
+constant,config_bus_standard,wishbone,,
+constant,config_bus_data_width,32,,
+constant,config_bus_address_width,32,,
+constant,config_bus_bursting,0,,
+constant,ethmac_rx_slots,2,,
+constant,ethmac_tx_slots,2,,
+constant,ethmac_slot_size,2048,,
+memory_region,ethmac,0x00020000,8192,io
+memory_region,csr,0x00000000,65536,io

gateware/liteeth/doc/_build/html/.buildinfo

@@ -0,0 +1,4 @@
+# Sphinx build info version 1
+# This file hashes the configuration used when building these files. When it is not found, a full rebuild will be done.
+config: 28ef08ec4e423293fcd84bd376912618
+tags: 645f666f9bcd5a90fca523b33c5a78b7

gateware/liteeth/doc/_build/html/_sources/ctrl.rst.txt

@@ -0,0 +1,78 @@
+CTRL
+====
+
+Register Listing for CTRL
+-------------------------
+
++------------------------------------------+-------------------------------------+
+| Register                                 | Address                             |
++==========================================+=====================================+
+| :ref:`CTRL_RESET <CTRL_RESET>`           | :ref:`0x00000000 <CTRL_RESET>`      |
++------------------------------------------+-------------------------------------+
+| :ref:`CTRL_SCRATCH <CTRL_SCRATCH>`       | :ref:`0x00000004 <CTRL_SCRATCH>`    |
++------------------------------------------+-------------------------------------+
+| :ref:`CTRL_BUS_ERRORS <CTRL_BUS_ERRORS>` | :ref:`0x00000008 <CTRL_BUS_ERRORS>` |
++------------------------------------------+-------------------------------------+
+
+CTRL_RESET
+^^^^^^^^^^
+
+`Address: 0x00000000 + 0x0 = 0x00000000`
+
+
+    .. wavedrom::
+        :caption: CTRL_RESET
+
+        {
+            "reg": [
+                {"name": "soc_rst",  "type": 4, "bits": 1},
+                {"name": "cpu_rst",  "bits": 1},
+                {"bits": 30}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+---------+------------------------------------------------------------------------+
+| Field | Name    | Description                                                            |
++=======+=========+========================================================================+
+| [0]   | SOC_RST | Write `1` to this register to reset the full SoC (Pulse Reset)         |
++-------+---------+------------------------------------------------------------------------+
+| [1]   | CPU_RST | Write `1` to this register to reset the CPU(s) of the SoC (Hold Reset) |
++-------+---------+------------------------------------------------------------------------+
+
+CTRL_SCRATCH
+^^^^^^^^^^^^
+
+`Address: 0x00000000 + 0x4 = 0x00000004`
+
+    Use this register as a scratch space to verify that software read/write accesses
+    to the Wishbone/CSR bus are working correctly. The initial reset value of
+    0x1234578 can be used to verify endianness.
+
+    .. wavedrom::
+        :caption: CTRL_SCRATCH
+
+        {
+            "reg": [
+                {"name": "scratch[31:0]", "attr": 'reset: 305419896', "bits": 32}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+        }
+
+
+CTRL_BUS_ERRORS
+^^^^^^^^^^^^^^^
+
+`Address: 0x00000000 + 0x8 = 0x00000008`
+
+    Total number of Wishbone bus errors (timeouts) since start.
+
+    .. wavedrom::
+        :caption: CTRL_BUS_ERRORS
+
+        {
+            "reg": [
+                {"name": "bus_errors[31:0]", "bits": 32}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+        }
+
+

gateware/liteeth/doc/_build/html/_sources/ethmac.rst.txt

@@ -0,0 +1,380 @@
+ETHMAC
+======
+
+Register Listing for ETHMAC
+---------------------------
+
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| Register                                                                       | Address                                                |
++================================================================================+========================================================+
+| :ref:`ETHMAC_SRAM_WRITER_SLOT <ETHMAC_SRAM_WRITER_SLOT>`                       | :ref:`0x00000800 <ETHMAC_SRAM_WRITER_SLOT>`            |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_WRITER_LENGTH <ETHMAC_SRAM_WRITER_LENGTH>`                   | :ref:`0x00000804 <ETHMAC_SRAM_WRITER_LENGTH>`          |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_WRITER_ERRORS <ETHMAC_SRAM_WRITER_ERRORS>`                   | :ref:`0x00000808 <ETHMAC_SRAM_WRITER_ERRORS>`          |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_WRITER_EV_STATUS <ETHMAC_SRAM_WRITER_EV_STATUS>`             | :ref:`0x0000080c <ETHMAC_SRAM_WRITER_EV_STATUS>`       |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_WRITER_EV_PENDING <ETHMAC_SRAM_WRITER_EV_PENDING>`           | :ref:`0x00000810 <ETHMAC_SRAM_WRITER_EV_PENDING>`      |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_WRITER_EV_ENABLE <ETHMAC_SRAM_WRITER_EV_ENABLE>`             | :ref:`0x00000814 <ETHMAC_SRAM_WRITER_EV_ENABLE>`       |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_READER_START <ETHMAC_SRAM_READER_START>`                     | :ref:`0x00000818 <ETHMAC_SRAM_READER_START>`           |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_READER_READY <ETHMAC_SRAM_READER_READY>`                     | :ref:`0x0000081c <ETHMAC_SRAM_READER_READY>`           |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_READER_LEVEL <ETHMAC_SRAM_READER_LEVEL>`                     | :ref:`0x00000820 <ETHMAC_SRAM_READER_LEVEL>`           |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_READER_SLOT <ETHMAC_SRAM_READER_SLOT>`                       | :ref:`0x00000824 <ETHMAC_SRAM_READER_SLOT>`            |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_READER_LENGTH <ETHMAC_SRAM_READER_LENGTH>`                   | :ref:`0x00000828 <ETHMAC_SRAM_READER_LENGTH>`          |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_READER_EV_STATUS <ETHMAC_SRAM_READER_EV_STATUS>`             | :ref:`0x0000082c <ETHMAC_SRAM_READER_EV_STATUS>`       |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_READER_EV_PENDING <ETHMAC_SRAM_READER_EV_PENDING>`           | :ref:`0x00000830 <ETHMAC_SRAM_READER_EV_PENDING>`      |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_READER_EV_ENABLE <ETHMAC_SRAM_READER_EV_ENABLE>`             | :ref:`0x00000834 <ETHMAC_SRAM_READER_EV_ENABLE>`       |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_PREAMBLE_CRC <ETHMAC_PREAMBLE_CRC>`                               | :ref:`0x00000838 <ETHMAC_PREAMBLE_CRC>`                |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS <ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS>` | :ref:`0x0000083c <ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS>` |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_RX_DATAPATH_CRC_ERRORS <ETHMAC_RX_DATAPATH_CRC_ERRORS>`           | :ref:`0x00000840 <ETHMAC_RX_DATAPATH_CRC_ERRORS>`      |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+
+ETHMAC_SRAM_WRITER_SLOT
+^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x0 = 0x00000800`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_WRITER_SLOT
+
+        {
+            "reg": [
+                {"name": "sram_writer_slot", "bits": 1},
+                {"bits": 31},
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
+ETHMAC_SRAM_WRITER_LENGTH
+^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x4 = 0x00000804`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_WRITER_LENGTH
+
+        {
+            "reg": [
+                {"name": "sram_writer_length[10:0]", "bits": 11},
+                {"bits": 21},
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+        }
+
+
+ETHMAC_SRAM_WRITER_ERRORS
+^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x8 = 0x00000808`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_WRITER_ERRORS
+
+        {
+            "reg": [
+                {"name": "sram_writer_errors[31:0]", "bits": 32}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+        }
+
+
+ETHMAC_SRAM_WRITER_EV_STATUS
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0xc = 0x0000080c`
+
+    This register contains the current raw level of the available event trigger.
+    Writes to this register have no effect.
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_WRITER_EV_STATUS
+
+        {
+            "reg": [
+                {"name": "available",  "bits": 1},
+                {"bits": 31}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+-----------+----------------------------------+
+| Field | Name      | Description                      |
++=======+===========+==================================+
+| [0]   | AVAILABLE | Level of the ``available`` event |
++-------+-----------+----------------------------------+
+
+ETHMAC_SRAM_WRITER_EV_PENDING
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x10 = 0x00000810`
+
+    When a  available event occurs, the corresponding bit will be set in this
+    register.  To clear the Event, set the corresponding bit in this register.
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_WRITER_EV_PENDING
+
+        {
+            "reg": [
+                {"name": "available",  "bits": 1},
+                {"bits": 31}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+-----------+---------------------------------------------------------------------------------+
+| Field | Name      | Description                                                                     |
++=======+===========+=================================================================================+
+| [0]   | AVAILABLE | `1` if a `available` event occurred. This Event is **level triggered** when the |
+|       |           | signal is **high**.                                                             |
++-------+-----------+---------------------------------------------------------------------------------+
+
+ETHMAC_SRAM_WRITER_EV_ENABLE
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x14 = 0x00000814`
+
+    This register enables the corresponding available events.  Write a ``0`` to this
+    register to disable individual events.
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_WRITER_EV_ENABLE
+
+        {
+            "reg": [
+                {"name": "available",  "bits": 1},
+                {"bits": 31}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+-----------+-------------------------------------------------+
+| Field | Name      | Description                                     |
++=======+===========+=================================================+
+| [0]   | AVAILABLE | Write a ``1`` to enable the ``available`` Event |
++-------+-----------+-------------------------------------------------+
+
+ETHMAC_SRAM_READER_START
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x18 = 0x00000818`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_READER_START
+
+        {
+            "reg": [
+                {"name": "sram_reader_start", "bits": 1},
+                {"bits": 31},
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
+ETHMAC_SRAM_READER_READY
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x1c = 0x0000081c`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_READER_READY
+
+        {
+            "reg": [
+                {"name": "sram_reader_ready", "bits": 1},
+                {"bits": 31},
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
+ETHMAC_SRAM_READER_LEVEL
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x20 = 0x00000820`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_READER_LEVEL
+
+        {
+            "reg": [
+                {"name": "sram_reader_level[1:0]", "bits": 2},
+                {"bits": 30},
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
+ETHMAC_SRAM_READER_SLOT
+^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x24 = 0x00000824`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_READER_SLOT
+
+        {
+            "reg": [
+                {"name": "sram_reader_slot", "bits": 1},
+                {"bits": 31},
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
+ETHMAC_SRAM_READER_LENGTH
+^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x28 = 0x00000828`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_READER_LENGTH
+
+        {
+            "reg": [
+                {"name": "sram_reader_length[10:0]", "bits": 11},
+                {"bits": 21},
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+        }
+
+
+ETHMAC_SRAM_READER_EV_STATUS
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x2c = 0x0000082c`
+
+    This register contains the current raw level of the event0 event trigger.
+    Writes to this register have no effect.
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_READER_EV_STATUS
+
+        {
+            "reg": [
+                {"name": "event0",  "bits": 1},
+                {"bits": 31}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+--------+-------------------------------+
+| Field | Name   | Description                   |
++=======+========+===============================+
+| [0]   | EVENT0 | Level of the ``event0`` event |
++-------+--------+-------------------------------+
+
+ETHMAC_SRAM_READER_EV_PENDING
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x30 = 0x00000830`
+
+    When a  event0 event occurs, the corresponding bit will be set in this register.
+    To clear the Event, set the corresponding bit in this register.
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_READER_EV_PENDING
+
+        {
+            "reg": [
+                {"name": "event0",  "bits": 1},
+                {"bits": 31}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+--------+----------------------------------------------------------------------------------+
+| Field | Name   | Description                                                                      |
++=======+========+==================================================================================+
+| [0]   | EVENT0 | `1` if a this particular event occurred. This Event is triggered on a **rising** |
+|       |        | edge.                                                                            |
++-------+--------+----------------------------------------------------------------------------------+
+
+ETHMAC_SRAM_READER_EV_ENABLE
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x34 = 0x00000834`
+
+    This register enables the corresponding event0 events.  Write a ``0`` to this
+    register to disable individual events.
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_READER_EV_ENABLE
+
+        {
+            "reg": [
+                {"name": "event0",  "bits": 1},
+                {"bits": 31}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+--------+----------------------------------------------+
+| Field | Name   | Description                                  |
++=======+========+==============================================+
+| [0]   | EVENT0 | Write a ``1`` to enable the ``event0`` Event |
++-------+--------+----------------------------------------------+
+
+ETHMAC_PREAMBLE_CRC
+^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x38 = 0x00000838`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_PREAMBLE_CRC
+
+        {
+            "reg": [
+                {"name": "preamble_crc", "attr": 'reset: 1', "bits": 1},
+                {"bits": 31},
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
+ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x3c = 0x0000083c`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS
+
+        {
+            "reg": [
+                {"name": "rx_datapath_preamble_errors[31:0]", "bits": 32}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+        }
+
+
+ETHMAC_RX_DATAPATH_CRC_ERRORS
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x40 = 0x00000840`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_RX_DATAPATH_CRC_ERRORS
+
+        {
+            "reg": [
+                {"name": "rx_datapath_crc_errors[31:0]", "bits": 32}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+        }
+
+

gateware/liteeth/doc/_build/html/_sources/ethphy.rst.txt

@@ -0,0 +1,138 @@
+ETHPHY
+======
+
+Register Listing for ETHPHY
+---------------------------
+
++----------------------------------------------------------+---------------------------------------------+
+| Register                                                 | Address                                     |
++==========================================================+=============================================+
+| :ref:`ETHPHY_CRG_RESET <ETHPHY_CRG_RESET>`               | :ref:`0x00001000 <ETHPHY_CRG_RESET>`        |
++----------------------------------------------------------+---------------------------------------------+
+| :ref:`ETHPHY_RX_INBAND_STATUS <ETHPHY_RX_INBAND_STATUS>` | :ref:`0x00001004 <ETHPHY_RX_INBAND_STATUS>` |
++----------------------------------------------------------+---------------------------------------------+
+| :ref:`ETHPHY_MDIO_W <ETHPHY_MDIO_W>`                     | :ref:`0x00001008 <ETHPHY_MDIO_W>`           |
++----------------------------------------------------------+---------------------------------------------+
+| :ref:`ETHPHY_MDIO_R <ETHPHY_MDIO_R>`                     | :ref:`0x0000100c <ETHPHY_MDIO_R>`           |
++----------------------------------------------------------+---------------------------------------------+
+
+ETHPHY_CRG_RESET
+^^^^^^^^^^^^^^^^
+
+`Address: 0x00001000 + 0x0 = 0x00001000`
+
+
+    .. wavedrom::
+        :caption: ETHPHY_CRG_RESET
+
+        {
+            "reg": [
+                {"name": "crg_reset", "bits": 1},
+                {"bits": 31},
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
+ETHPHY_RX_INBAND_STATUS
+^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00001000 + 0x4 = 0x00001004`
+
+
+    .. wavedrom::
+        :caption: ETHPHY_RX_INBAND_STATUS
+
+        {
+            "reg": [
+                {"name": "link_status",  "bits": 1},
+                {"name": "clock_speed",  "bits": 1},
+                {"name": "duplex_status",  "bits": 1},
+                {"bits": 29}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+---------------+-----------------------------------+
+| Field | Name          | Description                       |
++=======+===============+===================================+
+| [0]   | LINK_STATUS   |                                   |
+|       |               |                                   |
+|       |               | +---------+-------------+         |
+|       |               | | Value   | Description |         |
+|       |               | +=========+=============+         |
+|       |               | | ``0b0`` | Link down.  |         |
+|       |               | +---------+-------------+         |
+|       |               | | ``0b1`` | Link up.    |         |
+|       |               | +---------+-------------+         |
++-------+---------------+-----------------------------------+
+| [1]   | CLOCK_SPEED   |                                   |
+|       |               |                                   |
+|       |               | +----------+--------------------+ |
+|       |               | | Value    | Description        | |
+|       |               | +==========+====================+ |
+|       |               | | ``0b00`` | 2.5MHz   (10Mbps). | |
+|       |               | +----------+--------------------+ |
+|       |               | | ``0b01`` | 25MHz   (100MBps). | |
+|       |               | +----------+--------------------+ |
+|       |               | | ``0b10`` | 125MHz (1000MBps). | |
+|       |               | +----------+--------------------+ |
++-------+---------------+-----------------------------------+
+| [2]   | DUPLEX_STATUS |                                   |
+|       |               |                                   |
+|       |               | +---------+--------------+        |
+|       |               | | Value   | Description  |        |
+|       |               | +=========+==============+        |
+|       |               | | ``0b0`` | Half-duplex. |        |
+|       |               | +---------+--------------+        |
+|       |               | | ``0b1`` | Full-duplex. |        |
+|       |               | +---------+--------------+        |
++-------+---------------+-----------------------------------+
+
+ETHPHY_MDIO_W
+^^^^^^^^^^^^^
+
+`Address: 0x00001000 + 0x8 = 0x00001008`
+
+
+    .. wavedrom::
+        :caption: ETHPHY_MDIO_W
+
+        {
+            "reg": [
+                {"name": "mdc",  "bits": 1},
+                {"name": "oe",  "bits": 1},
+                {"name": "w",  "bits": 1},
+                {"bits": 29}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+------+-------------+
+| Field | Name | Description |
++=======+======+=============+
++-------+------+-------------+
++-------+------+-------------+
++-------+------+-------------+
+
+ETHPHY_MDIO_R
+^^^^^^^^^^^^^
+
+`Address: 0x00001000 + 0xc = 0x0000100c`
+
+
+    .. wavedrom::
+        :caption: ETHPHY_MDIO_R
+
+        {
+            "reg": [
+                {"name": "r",  "bits": 1},
+                {"bits": 31}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+------+-------------+
+| Field | Name | Description |
++=======+======+=============+
++-------+------+-------------+
+

gateware/liteeth/doc/_build/html/_sources/index.rst.txt

@@ -0,0 +1,31 @@
+
+Documentation for LiteX SoC Project
+===================================
+
+
+
+Modules
+=======
+
+.. toctree::
+    :maxdepth: 1
+
+    interrupts
+
+Register Groups
+===============
+
+.. toctree::
+    :maxdepth: 1
+
+    ctrl
+    ethmac
+    ethphy
+
+Indices and tables
+==================
+
+* :ref:`genindex`
+* :ref:`modindex`
+* :ref:`search`
+

gateware/liteeth/doc/_build/html/_sources/interrupts.rst.txt

@@ -0,0 +1,18 @@
+Interrupt Controller
+====================
+
+This device has an ``EventManager``-based interrupt system.  Individual modules
+generate `events` which are wired into a central interrupt controller.
+
+When an interrupt occurs, you should look the interrupt number up in the CPU-
+specific interrupt table and then call the relevant module.
+
+Assigned Interrupts
+-------------------
+
+The following interrupts are assigned on this system:
+
++-----------+--------+
+| Interrupt | Module |
++===========+========+
+

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gateware/liteeth/doc/_build/html/_static/basic.css

@@ -0,0 +1,903 @@
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+ *
+ * :copyright: Copyright 2007-2023 by the Sphinx team, see AUTHORS.
+ * :license: BSD, see LICENSE for details.
+ *
+ */
+
+/* -- main layout ----------------------------------------------------------- */
+
+div.clearer {
+    clear: both;
+}
+
+div.section::after {
+    display: block;
+    content: '';
+    clear: left;
+}
+
+/* -- relbar ---------------------------------------------------------------- */
+
+div.related {
+    width: 100%;
+    font-size: 90%;
+}
+
+div.related h3 {
+    display: none;
+}
+
+div.related ul {
+    margin: 0;
+    padding: 0 0 0 10px;
+    list-style: none;
+}
+
+div.related li {
+    display: inline;
+}
+
+div.related li.right {
+    float: right;
+    margin-right: 5px;
+}
+
+/* -- sidebar --------------------------------------------------------------- */
+
+div.sphinxsidebarwrapper {
+    padding: 10px 5px 0 10px;
+}
+
+div.sphinxsidebar {
+    float: left;
+    width: 230px;
+    margin-left: -100%;
+    font-size: 90%;
+    word-wrap: break-word;
+    overflow-wrap : break-word;
+}
+
+div.sphinxsidebar ul {
+    list-style: none;
+}
+
+div.sphinxsidebar ul ul,
+div.sphinxsidebar ul.want-points {
+    margin-left: 20px;
+    list-style: square;
+}
+
+div.sphinxsidebar ul ul {
+    margin-top: 0;
+    margin-bottom: 0;
+}
+
+div.sphinxsidebar form {
+    margin-top: 10px;
+}
+
+div.sphinxsidebar input {
+    border: 1px solid #98dbcc;
+    font-family: sans-serif;
+    font-size: 1em;
+}
+
+div.sphinxsidebar #searchbox form.search {
+    overflow: hidden;
+}
+
+div.sphinxsidebar #searchbox input[type="text"] {
+    float: left;
+    width: 80%;
+    padding: 0.25em;
+    box-sizing: border-box;
+}
+
+div.sphinxsidebar #searchbox input[type="submit"] {
+    float: left;
+    width: 20%;
+    border-left: none;
+    padding: 0.25em;
+    box-sizing: border-box;
+}
+
+
+img {
+    border: 0;
+    max-width: 100%;
+}
+
+/* -- search page ----------------------------------------------------------- */
+
+ul.search {
+    margin: 10px 0 0 20px;
+    padding: 0;
+}
+
+ul.search li {
+    padding: 5px 0 5px 20px;
+    background-image: url(file.png);
+    background-repeat: no-repeat;
+    background-position: 0 7px;
+}
+
+ul.search li a {
+    font-weight: bold;
+}
+
+ul.search li p.context {
+    color: #888;
+    margin: 2px 0 0 30px;
+    text-align: left;
+}
+
+ul.keywordmatches li.goodmatch a {
+    font-weight: bold;
+}
+
+/* -- index page ------------------------------------------------------------ */
+
+table.contentstable {
+    width: 90%;
+    margin-left: auto;
+    margin-right: auto;
+}
+
+table.contentstable p.biglink {
+    line-height: 150%;
+}
+
+a.biglink {
+    font-size: 1.3em;
+}
+
+span.linkdescr {
+    font-style: italic;
+    padding-top: 5px;
+    font-size: 90%;
+}
+
+/* -- general index --------------------------------------------------------- */
+
+table.indextable {
+    width: 100%;
+}
+
+table.indextable td {
+    text-align: left;
+    vertical-align: top;
+}
+
+table.indextable ul {
+    margin-top: 0;
+    margin-bottom: 0;
+    list-style-type: none;
+}
+
+table.indextable > tbody > tr > td > ul {
+    padding-left: 0em;
+}
+
+table.indextable tr.pcap {
+    height: 10px;
+}
+
+table.indextable tr.cap {
+    margin-top: 10px;
+    background-color: #f2f2f2;
+}
+
+img.toggler {
+    margin-right: 3px;
+    margin-top: 3px;
+    cursor: pointer;
+}
+
+div.modindex-jumpbox {
+    border-top: 1px solid #ddd;
+    border-bottom: 1px solid #ddd;
+    margin: 1em 0 1em 0;
+    padding: 0.4em;
+}
+
+div.genindex-jumpbox {
+    border-top: 1px solid #ddd;
+    border-bottom: 1px solid #ddd;
+    margin: 1em 0 1em 0;
+    padding: 0.4em;
+}
+
+/* -- domain module index --------------------------------------------------- */
+
+table.modindextable td {
+    padding: 2px;
+    border-collapse: collapse;
+}
+
+/* -- general body styles --------------------------------------------------- */
+
+div.body {
+    min-width: 360px;
+    max-width: 800px;
+}
+
+div.body p, div.body dd, div.body li, div.body blockquote {
+    -moz-hyphens: auto;
+    -ms-hyphens: auto;
+    -webkit-hyphens: auto;
+    hyphens: auto;
+}
+
+a.headerlink {
+    visibility: hidden;
+}
+
+h1:hover > a.headerlink,
+h2:hover > a.headerlink,
+h3:hover > a.headerlink,
+h4:hover > a.headerlink,
+h5:hover > a.headerlink,
+h6:hover > a.headerlink,
+dt:hover > a.headerlink,
+caption:hover > a.headerlink,
+p.caption:hover > a.headerlink,
+div.code-block-caption:hover > a.headerlink {
+    visibility: visible;
+}
+
+div.body p.caption {
+    text-align: inherit;
+}
+
+div.body td {
+    text-align: left;
+}
+
+.first {
+    margin-top: 0 !important;
+}
+
+p.rubric {
+    margin-top: 30px;
+    font-weight: bold;
+}
+
+img.align-left, figure.align-left, .figure.align-left, object.align-left {
+    clear: left;
+    float: left;
+    margin-right: 1em;
+}
+
+img.align-right, figure.align-right, .figure.align-right, object.align-right {
+    clear: right;
+    float: right;
+    margin-left: 1em;
+}
+
+img.align-center, figure.align-center, .figure.align-center, object.align-center {
+  display: block;
+  margin-left: auto;
+  margin-right: auto;
+}
+
+img.align-default, figure.align-default, .figure.align-default {
+  display: block;
+  margin-left: auto;
+  margin-right: auto;
+}
+
+.align-left {
+    text-align: left;
+}
+
+.align-center {
+    text-align: center;
+}
+
+.align-default {
+    text-align: center;
+}
+
+.align-right {
+    text-align: right;
+}
+
+/* -- sidebars -------------------------------------------------------------- */
+
+div.sidebar,
+aside.sidebar {
+    margin: 0 0 0.5em 1em;
+    border: 1px solid #ddb;
+    padding: 7px;
+    background-color: #ffe;
+    width: 40%;
+    float: right;
+    clear: right;
+    overflow-x: auto;
+}
+
+p.sidebar-title {
+    font-weight: bold;
+}
+
+nav.contents,
+aside.topic,
+div.admonition, div.topic, blockquote {
+    clear: left;
+}
+
+/* -- topics ---------------------------------------------------------------- */
+
+nav.contents,
+aside.topic,
+div.topic {
+    border: 1px solid #ccc;
+    padding: 7px;
+    margin: 10px 0 10px 0;
+}
+
+p.topic-title {
+    font-size: 1.1em;
+    font-weight: bold;
+    margin-top: 10px;
+}
+
+/* -- admonitions ----------------------------------------------------------- */
+
+div.admonition {
+    margin-top: 10px;
+    margin-bottom: 10px;
+    padding: 7px;
+}
+
+div.admonition dt {
+    font-weight: bold;
+}
+
+p.admonition-title {
+    margin: 0px 10px 5px 0px;
+    font-weight: bold;
+}
+
+div.body p.centered {
+    text-align: center;
+    margin-top: 25px;
+}
+
+/* -- content of sidebars/topics/admonitions -------------------------------- */
+
+div.sidebar > :last-child,
+aside.sidebar > :last-child,
+nav.contents > :last-child,
+aside.topic > :last-child,
+div.topic > :last-child,
+div.admonition > :last-child {
+    margin-bottom: 0;
+}
+
+div.sidebar::after,
+aside.sidebar::after,
+nav.contents::after,
+aside.topic::after,
+div.topic::after,
+div.admonition::after,
+blockquote::after {
+    display: block;
+    content: '';
+    clear: both;
+}
+
+/* -- tables ---------------------------------------------------------------- */
+
+table.docutils {
+    margin-top: 10px;
+    margin-bottom: 10px;
+    border: 0;
+    border-collapse: collapse;
+}
+
+table.align-center {
+    margin-left: auto;
+    margin-right: auto;
+}
+
+table.align-default {
+    margin-left: auto;
+    margin-right: auto;
+}
+
+table caption span.caption-number {
+    font-style: italic;
+}
+
+table caption span.caption-text {
+}
+
+table.docutils td, table.docutils th {
+    padding: 1px 8px 1px 5px;
+    border-top: 0;
+    border-left: 0;
+    border-right: 0;
+    border-bottom: 1px solid #aaa;
+}
+
+th {
+    text-align: left;
+    padding-right: 5px;
+}
+
+table.citation {
+    border-left: solid 1px gray;
+    margin-left: 1px;
+}
+
+table.citation td {
+    border-bottom: none;
+}
+
+th > :first-child,
+td > :first-child {
+    margin-top: 0px;
+}
+
+th > :last-child,
+td > :last-child {
+    margin-bottom: 0px;
+}
+
+/* -- figures --------------------------------------------------------------- */
+
+div.figure, figure {
+    margin: 0.5em;
+    padding: 0.5em;
+}
+
+div.figure p.caption, figcaption {
+    padding: 0.3em;
+}
+
+div.figure p.caption span.caption-number,
+figcaption span.caption-number {
+    font-style: italic;
+}
+
+div.figure p.caption span.caption-text,
+figcaption span.caption-text {
+}
+
+/* -- field list styles ----------------------------------------------------- */
+
+table.field-list td, table.field-list th {
+    border: 0 !important;
+}
+
+.field-list ul {
+    margin: 0;
+    padding-left: 1em;
+}
+
+.field-list p {
+    margin: 0;
+}
+
+.field-name {
+    -moz-hyphens: manual;
+    -ms-hyphens: manual;
+    -webkit-hyphens: manual;
+    hyphens: manual;
+}
+
+/* -- hlist styles ---------------------------------------------------------- */
+
+table.hlist {
+    margin: 1em 0;
+}
+
+table.hlist td {
+    vertical-align: top;
+}
+
+/* -- object description styles --------------------------------------------- */
+
+.sig {
+	font-family: 'Consolas', 'Menlo', 'DejaVu Sans Mono', 'Bitstream Vera Sans Mono', monospace;
+}
+
+.sig-name, code.descname {
+    background-color: transparent;
+    font-weight: bold;
+}
+
+.sig-name {
+	font-size: 1.1em;
+}
+
+code.descname {
+    font-size: 1.2em;
+}
+
+.sig-prename, code.descclassname {
+    background-color: transparent;
+}
+
+.optional {
+    font-size: 1.3em;
+}
+
+.sig-paren {
+    font-size: larger;
+}
+
+.sig-param.n {
+	font-style: italic;
+}
+
+/* C++ specific styling */
+
+.sig-inline.c-texpr,
+.sig-inline.cpp-texpr {
+	font-family: unset;
+}
+
+.sig.c   .k, .sig.c   .kt,
+.sig.cpp .k, .sig.cpp .kt {
+	color: #0033B3;
+}
+
+.sig.c   .m,
+.sig.cpp .m {
+	color: #1750EB;
+}
+
+.sig.c   .s, .sig.c   .sc,
+.sig.cpp .s, .sig.cpp .sc {
+	color: #067D17;
+}
+
+
+/* -- other body styles ----------------------------------------------------- */
+
+ol.arabic {
+    list-style: decimal;
+}
+
+ol.loweralpha {
+    list-style: lower-alpha;
+}
+
+ol.upperalpha {
+    list-style: upper-alpha;
+}
+
+ol.lowerroman {
+    list-style: lower-roman;
+}
+
+ol.upperroman {
+    list-style: upper-roman;
+}
+
+:not(li) > ol > li:first-child > :first-child,
+:not(li) > ul > li:first-child > :first-child {
+    margin-top: 0px;
+}
+
+:not(li) > ol > li:last-child > :last-child,
+:not(li) > ul > li:last-child > :last-child {
+    margin-bottom: 0px;
+}
+
+ol.simple ol p,
+ol.simple ul p,
+ul.simple ol p,
+ul.simple ul p {
+    margin-top: 0;
+}
+
+ol.simple > li:not(:first-child) > p,
+ul.simple > li:not(:first-child) > p {
+    margin-top: 0;
+}
+
+ol.simple p,
+ul.simple p {
+    margin-bottom: 0;
+}
+
+aside.footnote > span,
+div.citation > span {
+    float: left;
+}
+aside.footnote > span:last-of-type,
+div.citation > span:last-of-type {
+  padding-right: 0.5em;
+}
+aside.footnote > p {
+  margin-left: 2em;
+}
+div.citation > p {
+  margin-left: 4em;
+}
+aside.footnote > p:last-of-type,
+div.citation > p:last-of-type {
+    margin-bottom: 0em;
+}
+aside.footnote > p:last-of-type:after,
+div.citation > p:last-of-type:after {
+    content: "";
+    clear: both;
+}
+
+dl.field-list {
+    display: grid;
+    grid-template-columns: fit-content(30%) auto;
+}
+
+dl.field-list > dt {
+    font-weight: bold;
+    word-break: break-word;
+    padding-left: 0.5em;
+    padding-right: 5px;
+}
+
+dl.field-list > dd {
+    padding-left: 0.5em;
+    margin-top: 0em;
+    margin-left: 0em;
+    margin-bottom: 0em;
+}
+
+dl {
+    margin-bottom: 15px;
+}
+
+dd > :first-child {
+    margin-top: 0px;
+}
+
+dd ul, dd table {
+    margin-bottom: 10px;
+}
+
+dd {
+    margin-top: 3px;
+    margin-bottom: 10px;
+    margin-left: 30px;
+}
+
+dl > dd:last-child,
+dl > dd:last-child > :last-child {
+    margin-bottom: 0;
+}
+
+dt:target, span.highlighted {
+    background-color: #fbe54e;
+}
+
+rect.highlighted {
+    fill: #fbe54e;
+}
+
+dl.glossary dt {
+    font-weight: bold;
+    font-size: 1.1em;
+}
+
+.versionmodified {
+    font-style: italic;
+}
+
+.system-message {
+    background-color: #fda;
+    padding: 5px;
+    border: 3px solid red;
+}
+
+.footnote:target  {
+    background-color: #ffa;
+}
+
+.line-block {
+    display: block;
+    margin-top: 1em;
+    margin-bottom: 1em;
+}
+
+.line-block .line-block {
+    margin-top: 0;
+    margin-bottom: 0;
+    margin-left: 1.5em;
+}
+
+.guilabel, .menuselection {
+    font-family: sans-serif;
+}
+
+.accelerator {
+    text-decoration: underline;
+}
+
+.classifier {
+    font-style: oblique;
+}
+
+.classifier:before {
+    font-style: normal;
+    margin: 0 0.5em;
+    content: ":";
+    display: inline-block;
+}
+
+abbr, acronym {
+    border-bottom: dotted 1px;
+    cursor: help;
+}
+
+/* -- code displays --------------------------------------------------------- */
+
+pre {
+    overflow: auto;
+    overflow-y: hidden;  /* fixes display issues on Chrome browsers */
+}
+
+pre, div[class*="highlight-"] {
+    clear: both;
+}
+
+span.pre {
+    -moz-hyphens: none;
+    -ms-hyphens: none;
+    -webkit-hyphens: none;
+    hyphens: none;
+    white-space: nowrap;
+}
+
+div[class*="highlight-"] {
+    margin: 1em 0;
+}
+
+td.linenos pre {
+    border: 0;
+    background-color: transparent;
+    color: #aaa;
+}
+
+table.highlighttable {
+    display: block;
+}
+
+table.highlighttable tbody {
+    display: block;
+}
+
+table.highlighttable tr {
+    display: flex;
+}
+
+table.highlighttable td {
+    margin: 0;
+    padding: 0;
+}
+
+table.highlighttable td.linenos {
+    padding-right: 0.5em;
+}
+
+table.highlighttable td.code {
+    flex: 1;
+    overflow: hidden;
+}
+
+.highlight .hll {
+    display: block;
+}
+
+div.highlight pre,
+table.highlighttable pre {
+    margin: 0;
+}
+
+div.code-block-caption + div {
+    margin-top: 0;
+}
+
+div.code-block-caption {
+    margin-top: 1em;
+    padding: 2px 5px;
+    font-size: small;
+}
+
+div.code-block-caption code {
+    background-color: transparent;
+}
+
+table.highlighttable td.linenos,
+span.linenos,
+div.highlight span.gp {  /* gp: Generic.Prompt */
+  user-select: none;
+  -webkit-user-select: text; /* Safari fallback only */
+  -webkit-user-select: none; /* Chrome/Safari */
+  -moz-user-select: none; /* Firefox */
+  -ms-user-select: none; /* IE10+ */
+}
+
+div.code-block-caption span.caption-number {
+    padding: 0.1em 0.3em;
+    font-style: italic;
+}
+
+div.code-block-caption span.caption-text {
+}
+
+div.literal-block-wrapper {
+    margin: 1em 0;
+}
+
+code.xref, a code {
+    background-color: transparent;
+    font-weight: bold;
+}
+
+h1 code, h2 code, h3 code, h4 code, h5 code, h6 code {
+    background-color: transparent;
+}
+
+.viewcode-link {
+    float: right;
+}
+
+.viewcode-back {
+    float: right;
+    font-family: sans-serif;
+}
+
+div.viewcode-block:target {
+    margin: -1px -10px;
+    padding: 0 10px;
+}
+
+/* -- math display ---------------------------------------------------------- */
+
+img.math {
+    vertical-align: middle;
+}
+
+div.body div.math p {
+    text-align: center;
+}
+
+span.eqno {
+    float: right;
+}
+
+span.eqno a.headerlink {
+    position: absolute;
+    z-index: 1;
+}
+
+div.math:hover a.headerlink {
+    visibility: visible;
+}
+
+/* -- printout stylesheet --------------------------------------------------- */
+
+@media print {
+    div.document,
+    div.documentwrapper,
+    div.bodywrapper {
+        margin: 0 !important;
+        width: 100%;
+    }
+
+    div.sphinxsidebar,
+    div.related,
+    div.footer,
+    #top-link {
+        display: none;
+    }
+}

gateware/liteeth/doc/_build/html/_static/custom.css

@@ -0,0 +1 @@
+/* This file intentionally left blank. */

gateware/liteeth/doc/_build/html/_static/doctools.js

@@ -0,0 +1,156 @@
+/*
+ * doctools.js
+ * ~~~~~~~~~~~
+ *
+ * Base JavaScript utilities for all Sphinx HTML documentation.
+ *
+ * :copyright: Copyright 2007-2023 by the Sphinx team, see AUTHORS.
+ * :license: BSD, see LICENSE for details.
+ *
+ */
+"use strict";
+
+const BLACKLISTED_KEY_CONTROL_ELEMENTS = new Set([
+  "TEXTAREA",
+  "INPUT",
+  "SELECT",
+  "BUTTON",
+]);
+
+const _ready = (callback) => {
+  if (document.readyState !== "loading") {
+    callback();
+  } else {
+    document.addEventListener("DOMContentLoaded", callback);
+  }
+};
+
+/**
+ * Small JavaScript module for the documentation.
+ */
+const Documentation = {
+  init: () => {
+    Documentation.initDomainIndexTable();
+    Documentation.initOnKeyListeners();
+  },
+
+  /**
+   * i18n support
+   */
+  TRANSLATIONS: {},
+  PLURAL_EXPR: (n) => (n === 1 ? 0 : 1),
+  LOCALE: "unknown",
+
+  // gettext and ngettext don't access this so that the functions
+  // can safely bound to a different name (_ = Documentation.gettext)
+  gettext: (string) => {
+    const translated = Documentation.TRANSLATIONS[string];
+    switch (typeof translated) {
+      case "undefined":
+        return string; // no translation
+      case "string":
+        return translated; // translation exists
+      default:
+        return translated[0]; // (singular, plural) translation tuple exists
+    }
+  },
+
+  ngettext: (singular, plural, n) => {
+    const translated = Documentation.TRANSLATIONS[singular];
+    if (typeof translated !== "undefined")
+      return translated[Documentation.PLURAL_EXPR(n)];
+    return n === 1 ? singular : plural;
+  },
+
+  addTranslations: (catalog) => {
+    Object.assign(Documentation.TRANSLATIONS, catalog.messages);
+    Documentation.PLURAL_EXPR = new Function(
+      "n",
+      `return (${catalog.plural_expr})`
+    );
+    Documentation.LOCALE = catalog.locale;
+  },
+
+  /**
+   * helper function to focus on search bar
+   */
+  focusSearchBar: () => {
+    document.querySelectorAll("input[name=q]")[0]?.focus();
+  },
+
+  /**
+   * Initialise the domain index toggle buttons
+   */
+  initDomainIndexTable: () => {
+    const toggler = (el) => {
+      const idNumber = el.id.substr(7);
+      const toggledRows = document.querySelectorAll(`tr.cg-${idNumber}`);
+      if (el.src.substr(-9) === "minus.png") {
+        el.src = `${el.src.substr(0, el.src.length - 9)}plus.png`;
+        toggledRows.forEach((el) => (el.style.display = "none"));
+      } else {
+        el.src = `${el.src.substr(0, el.src.length - 8)}minus.png`;
+        toggledRows.forEach((el) => (el.style.display = ""));
+      }
+    };
+
+    const togglerElements = document.querySelectorAll("img.toggler");
+    togglerElements.forEach((el) =>
+      el.addEventListener("click", (event) => toggler(event.currentTarget))
+    );
+    togglerElements.forEach((el) => (el.style.display = ""));
+    if (DOCUMENTATION_OPTIONS.COLLAPSE_INDEX) togglerElements.forEach(toggler);
+  },
+
+  initOnKeyListeners: () => {
+    // only install a listener if it is really needed
+    if (
+      !DOCUMENTATION_OPTIONS.NAVIGATION_WITH_KEYS &&
+      !DOCUMENTATION_OPTIONS.ENABLE_SEARCH_SHORTCUTS
+    )
+      return;
+
+    document.addEventListener("keydown", (event) => {
+      // bail for input elements
+      if (BLACKLISTED_KEY_CONTROL_ELEMENTS.has(document.activeElement.tagName)) return;
+      // bail with special keys
+      if (event.altKey || event.ctrlKey || event.metaKey) return;
+
+      if (!event.shiftKey) {
+        switch (event.key) {
+          case "ArrowLeft":
+            if (!DOCUMENTATION_OPTIONS.NAVIGATION_WITH_KEYS) break;
+
+            const prevLink = document.querySelector('link[rel="prev"]');
+            if (prevLink && prevLink.href) {
+              window.location.href = prevLink.href;
+              event.preventDefault();
+            }
+            break;
+          case "ArrowRight":
+            if (!DOCUMENTATION_OPTIONS.NAVIGATION_WITH_KEYS) break;
+
+            const nextLink = document.querySelector('link[rel="next"]');
+            if (nextLink && nextLink.href) {
+              window.location.href = nextLink.href;
+              event.preventDefault();
+            }
+            break;
+        }
+      }
+
+      // some keyboard layouts may need Shift to get /
+      switch (event.key) {
+        case "/":
+          if (!DOCUMENTATION_OPTIONS.ENABLE_SEARCH_SHORTCUTS) break;
+          Documentation.focusSearchBar();
+          event.preventDefault();
+      }
+    });
+  },
+};
+
+// quick alias for translations
+const _ = Documentation.gettext;
+
+_ready(Documentation.init);

gateware/liteeth/doc/_build/html/_static/documentation_options.js

@@ -0,0 +1,14 @@
+var DOCUMENTATION_OPTIONS = {
+    URL_ROOT: document.getElementById("documentation_options").getAttribute('data-url_root'),
+    VERSION: '',
+    LANGUAGE: 'en',
+    COLLAPSE_INDEX: false,
+    BUILDER: 'html',
+    FILE_SUFFIX: '.html',
+    LINK_SUFFIX: '.html',
+    HAS_SOURCE: true,
+    SOURCELINK_SUFFIX: '.txt',
+    NAVIGATION_WITH_KEYS: false,
+    SHOW_SEARCH_SUMMARY: true,
+    ENABLE_SEARCH_SHORTCUTS: true,
+};

gateware/liteeth/doc/_build/html/_static/language_data.js

@@ -0,0 +1,199 @@
+/*
+ * language_data.js
+ * ~~~~~~~~~~~~~~~~
+ *
+ * This script contains the language-specific data used by searchtools.js,
+ * namely the list of stopwords, stemmer, scorer and splitter.
+ *
+ * :copyright: Copyright 2007-2023 by the Sphinx team, see AUTHORS.
+ * :license: BSD, see LICENSE for details.
+ *
+ */
+
+var stopwords = ["a", "and", "are", "as", "at", "be", "but", "by", "for", "if", "in", "into", "is", "it", "near", "no", "not", "of", "on", "or", "such", "that", "the", "their", "then", "there", "these", "they", "this", "to", "was", "will", "with"];
+
+
+/* Non-minified version is copied as a separate JS file, is available */
+
+/**
+ * Porter Stemmer
+ */
+var Stemmer = function() {
+
+  var step2list = {
+    ational: 'ate',
+    tional: 'tion',
+    enci: 'ence',
+    anci: 'ance',
+    izer: 'ize',
+    bli: 'ble',
+    alli: 'al',
+    entli: 'ent',
+    eli: 'e',
+    ousli: 'ous',
+    ization: 'ize',
+    ation: 'ate',
+    ator: 'ate',
+    alism: 'al',
+    iveness: 'ive',
+    fulness: 'ful',
+    ousness: 'ous',
+    aliti: 'al',
+    iviti: 'ive',
+    biliti: 'ble',
+    logi: 'log'
+  };
+
+  var step3list = {
+    icate: 'ic',
+    ative: '',
+    alize: 'al',
+    iciti: 'ic',
+    ical: 'ic',
+    ful: '',
+    ness: ''
+  };
+
+  var c = "[^aeiou]";          // consonant
+  var v = "[aeiouy]";          // vowel
+  var C = c + "[^aeiouy]*";    // consonant sequence
+  var V = v + "[aeiou]*";      // vowel sequence
+
+  var mgr0 = "^(" + C + ")?" + V + C;                      // [C]VC... is m>0
+  var meq1 = "^(" + C + ")?" + V + C + "(" + V + ")?$";    // [C]VC[V] is m=1
+  var mgr1 = "^(" + C + ")?" + V + C + V + C;              // [C]VCVC... is m>1
+  var s_v   = "^(" + C + ")?" + v;                         // vowel in stem
+
+  this.stemWord = function (w) {
+    var stem;
+    var suffix;
+    var firstch;
+    var origword = w;
+
+    if (w.length < 3)
+      return w;
+
+    var re;
+    var re2;
+    var re3;
+    var re4;
+
+    firstch = w.substr(0,1);
+    if (firstch == "y")
+      w = firstch.toUpperCase() + w.substr(1);
+
+    // Step 1a
+    re = /^(.+?)(ss|i)es$/;
+    re2 = /^(.+?)([^s])s$/;
+
+    if (re.test(w))
+      w = w.replace(re,"$1$2");
+    else if (re2.test(w))
+      w = w.replace(re2,"$1$2");
+
+    // Step 1b
+    re = /^(.+?)eed$/;
+    re2 = /^(.+?)(ed|ing)$/;
+    if (re.test(w)) {
+      var fp = re.exec(w);
+      re = new RegExp(mgr0);
+      if (re.test(fp[1])) {
+        re = /.$/;
+        w = w.replace(re,"");
+      }
+    }
+    else if (re2.test(w)) {
+      var fp = re2.exec(w);
+      stem = fp[1];
+      re2 = new RegExp(s_v);
+      if (re2.test(stem)) {
+        w = stem;
+        re2 = /(at|bl|iz)$/;
+        re3 = new RegExp("([^aeiouylsz])\\1$");
+        re4 = new RegExp("^" + C + v + "[^aeiouwxy]$");
+        if (re2.test(w))
+          w = w + "e";
+        else if (re3.test(w)) {
+          re = /.$/;
+          w = w.replace(re,"");
+        }
+        else if (re4.test(w))
+          w = w + "e";
+      }
+    }
+
+    // Step 1c
+    re = /^(.+?)y$/;
+    if (re.test(w)) {
+      var fp = re.exec(w);
+      stem = fp[1];
+      re = new RegExp(s_v);
+      if (re.test(stem))
+        w = stem + "i";
+    }
+
+    // Step 2
+    re = /^(.+?)(ational|tional|enci|anci|izer|bli|alli|entli|eli|ousli|ization|ation|ator|alism|iveness|fulness|ousness|aliti|iviti|biliti|logi)$/;
+    if (re.test(w)) {
+      var fp = re.exec(w);
+      stem = fp[1];
+      suffix = fp[2];
+      re = new RegExp(mgr0);
+      if (re.test(stem))
+        w = stem + step2list[suffix];
+    }
+
+    // Step 3
+    re = /^(.+?)(icate|ative|alize|iciti|ical|ful|ness)$/;
+    if (re.test(w)) {
+      var fp = re.exec(w);
+      stem = fp[1];
+      suffix = fp[2];
+      re = new RegExp(mgr0);
+      if (re.test(stem))
+        w = stem + step3list[suffix];
+    }
+
+    // Step 4
+    re = /^(.+?)(al|ance|ence|er|ic|able|ible|ant|ement|ment|ent|ou|ism|ate|iti|ous|ive|ize)$/;
+    re2 = /^(.+?)(s|t)(ion)$/;
+    if (re.test(w)) {
+      var fp = re.exec(w);
+      stem = fp[1];
+      re = new RegExp(mgr1);
+      if (re.test(stem))
+        w = stem;
+    }
+    else if (re2.test(w)) {
+      var fp = re2.exec(w);
+      stem = fp[1] + fp[2];
+      re2 = new RegExp(mgr1);
+      if (re2.test(stem))
+        w = stem;
+    }
+
+    // Step 5
+    re = /^(.+?)e$/;
+    if (re.test(w)) {
+      var fp = re.exec(w);
+      stem = fp[1];
+      re = new RegExp(mgr1);
+      re2 = new RegExp(meq1);
+      re3 = new RegExp("^" + C + v + "[^aeiouwxy]$");
+      if (re.test(stem) || (re2.test(stem) && !(re3.test(stem))))
+        w = stem;
+    }
+    re = /ll$/;
+    re2 = new RegExp(mgr1);
+    if (re.test(w) && re2.test(w)) {
+      re = /.$/;
+      w = w.replace(re,"");
+    }
+
+    // and turn initial Y back to y
+    if (firstch == "y")
+      w = firstch.toLowerCase() + w.substr(1);
+    return w;
+  }
+}
+

gateware/liteeth/doc/_build/html/_static/pygments.css

@@ -0,0 +1,83 @@
+pre { line-height: 125%; }
+td.linenos .normal { color: inherit; background-color: transparent; padding-left: 5px; padding-right: 5px; }
+span.linenos { color: inherit; background-color: transparent; padding-left: 5px; padding-right: 5px; }
+td.linenos .special { color: #000000; background-color: #ffffc0; padding-left: 5px; padding-right: 5px; }
+span.linenos.special { color: #000000; background-color: #ffffc0; padding-left: 5px; padding-right: 5px; }
+.highlight .hll { background-color: #ffffcc }
+.highlight { background: #f8f8f8; }
+.highlight .c { color: #8f5902; font-style: italic } /* Comment */
+.highlight .err { color: #a40000; border: 1px solid #ef2929 } /* Error */
+.highlight .g { color: #000000 } /* Generic */
+.highlight .k { color: #004461; font-weight: bold } /* Keyword */
+.highlight .l { color: #000000 } /* Literal */
+.highlight .n { color: #000000 } /* Name */
+.highlight .o { color: #582800 } /* Operator */
+.highlight .x { color: #000000 } /* Other */
+.highlight .p { color: #000000; font-weight: bold } /* Punctuation */
+.highlight .ch { color: #8f5902; font-style: italic } /* Comment.Hashbang */
+.highlight .cm { color: #8f5902; font-style: italic } /* Comment.Multiline */
+.highlight .cp { color: #8f5902 } /* Comment.Preproc */
+.highlight .cpf { color: #8f5902; font-style: italic } /* Comment.PreprocFile */
+.highlight .c1 { color: #8f5902; font-style: italic } /* Comment.Single */
+.highlight .cs { color: #8f5902; font-style: italic } /* Comment.Special */
+.highlight .gd { color: #a40000 } /* Generic.Deleted */
+.highlight .ge { color: #000000; font-style: italic } /* Generic.Emph */
+.highlight .gr { color: #ef2929 } /* Generic.Error */
+.highlight .gh { color: #000080; font-weight: bold } /* Generic.Heading */
+.highlight .gi { color: #00A000 } /* Generic.Inserted */
+.highlight .go { color: #888888 } /* Generic.Output */
+.highlight .gp { color: #745334 } /* Generic.Prompt */
+.highlight .gs { color: #000000; font-weight: bold } /* Generic.Strong */
+.highlight .gu { color: #800080; font-weight: bold } /* Generic.Subheading */
+.highlight .gt { color: #a40000; font-weight: bold } /* Generic.Traceback */
+.highlight .kc { color: #004461; font-weight: bold } /* Keyword.Constant */
+.highlight .kd { color: #004461; font-weight: bold } /* Keyword.Declaration */
+.highlight .kn { color: #004461; font-weight: bold } /* Keyword.Namespace */
+.highlight .kp { color: #004461; font-weight: bold } /* Keyword.Pseudo */
+.highlight .kr { color: #004461; font-weight: bold } /* Keyword.Reserved */
+.highlight .kt { color: #004461; font-weight: bold } /* Keyword.Type */
+.highlight .ld { color: #000000 } /* Literal.Date */
+.highlight .m { color: #990000 } /* Literal.Number */
+.highlight .s { color: #4e9a06 } /* Literal.String */
+.highlight .na { color: #c4a000 } /* Name.Attribute */
+.highlight .nb { color: #004461 } /* Name.Builtin */
+.highlight .nc { color: #000000 } /* Name.Class */
+.highlight .no { color: #000000 } /* Name.Constant */
+.highlight .nd { color: #888888 } /* Name.Decorator */
+.highlight .ni { color: #ce5c00 } /* Name.Entity */
+.highlight .ne { color: #cc0000; font-weight: bold } /* Name.Exception */
+.highlight .nf { color: #000000 } /* Name.Function */
+.highlight .nl { color: #f57900 } /* Name.Label */
+.highlight .nn { color: #000000 } /* Name.Namespace */
+.highlight .nx { color: #000000 } /* Name.Other */
+.highlight .py { color: #000000 } /* Name.Property */
+.highlight .nt { color: #004461; font-weight: bold } /* Name.Tag */
+.highlight .nv { color: #000000 } /* Name.Variable */
+.highlight .ow { color: #004461; font-weight: bold } /* Operator.Word */
+.highlight .pm { color: #000000; font-weight: bold } /* Punctuation.Marker */
+.highlight .w { color: #f8f8f8; text-decoration: underline } /* Text.Whitespace */
+.highlight .mb { color: #990000 } /* Literal.Number.Bin */
+.highlight .mf { color: #990000 } /* Literal.Number.Float */
+.highlight .mh { color: #990000 } /* Literal.Number.Hex */
+.highlight .mi { color: #990000 } /* Literal.Number.Integer */
+.highlight .mo { color: #990000 } /* Literal.Number.Oct */
+.highlight .sa { color: #4e9a06 } /* Literal.String.Affix */
+.highlight .sb { color: #4e9a06 } /* Literal.String.Backtick */
+.highlight .sc { color: #4e9a06 } /* Literal.String.Char */
+.highlight .dl { color: #4e9a06 } /* Literal.String.Delimiter */
+.highlight .sd { color: #8f5902; font-style: italic } /* Literal.String.Doc */
+.highlight .s2 { color: #4e9a06 } /* Literal.String.Double */
+.highlight .se { color: #4e9a06 } /* Literal.String.Escape */
+.highlight .sh { color: #4e9a06 } /* Literal.String.Heredoc */
+.highlight .si { color: #4e9a06 } /* Literal.String.Interpol */
+.highlight .sx { color: #4e9a06 } /* Literal.String.Other */
+.highlight .sr { color: #4e9a06 } /* Literal.String.Regex */
+.highlight .s1 { color: #4e9a06 } /* Literal.String.Single */
+.highlight .ss { color: #4e9a06 } /* Literal.String.Symbol */
+.highlight .bp { color: #3465a4 } /* Name.Builtin.Pseudo */
+.highlight .fm { color: #000000 } /* Name.Function.Magic */
+.highlight .vc { color: #000000 } /* Name.Variable.Class */
+.highlight .vg { color: #000000 } /* Name.Variable.Global */
+.highlight .vi { color: #000000 } /* Name.Variable.Instance */
+.highlight .vm { color: #000000 } /* Name.Variable.Magic */
+.highlight .il { color: #990000 } /* Literal.Number.Integer.Long */

gateware/liteeth/doc/_build/html/_static/searchtools.js

@@ -0,0 +1,566 @@
+/*
+ * searchtools.js
+ * ~~~~~~~~~~~~~~~~
+ *
+ * Sphinx JavaScript utilities for the full-text search.
+ *
+ * :copyright: Copyright 2007-2023 by the Sphinx team, see AUTHORS.
+ * :license: BSD, see LICENSE for details.
+ *
+ */
+"use strict";
+
+/**
+ * Simple result scoring code.
+ */
+if (typeof Scorer === "undefined") {
+  var Scorer = {
+    // Implement the following function to further tweak the score for each result
+    // The function takes a result array [docname, title, anchor, descr, score, filename]
+    // and returns the new score.
+    /*
+    score: result => {
+      const [docname, title, anchor, descr, score, filename] = result
+      return score
+    },
+    */
+
+    // query matches the full name of an object
+    objNameMatch: 11,
+    // or matches in the last dotted part of the object name
+    objPartialMatch: 6,
+    // Additive scores depending on the priority of the object
+    objPrio: {
+      0: 15, // used to be importantResults
+      1: 5, // used to be objectResults
+      2: -5, // used to be unimportantResults
+    },
+    //  Used when the priority is not in the mapping.
+    objPrioDefault: 0,
+
+    // query found in title
+    title: 15,
+    partialTitle: 7,
+    // query found in terms
+    term: 5,
+    partialTerm: 2,
+  };
+}
+
+const _removeChildren = (element) => {
+  while (element && element.lastChild) element.removeChild(element.lastChild);
+};
+
+/**
+ * See https://developer.mozilla.org/en-US/docs/Web/JavaScript/Guide/Regular_Expressions#escaping
+ */
+const _escapeRegExp = (string) =>
+  string.replace(/[.*+\-?^${}()|[\]\\]/g, "\\$&"); // $& means the whole matched string
+
+const _displayItem = (item, searchTerms) => {
+  const docBuilder = DOCUMENTATION_OPTIONS.BUILDER;
+  const docUrlRoot = DOCUMENTATION_OPTIONS.URL_ROOT;
+  const docFileSuffix = DOCUMENTATION_OPTIONS.FILE_SUFFIX;
+  const docLinkSuffix = DOCUMENTATION_OPTIONS.LINK_SUFFIX;
+  const showSearchSummary = DOCUMENTATION_OPTIONS.SHOW_SEARCH_SUMMARY;
+
+  const [docName, title, anchor, descr, score, _filename] = item;
+
+  let listItem = document.createElement("li");
+  let requestUrl;
+  let linkUrl;
+  if (docBuilder === "dirhtml") {
+    // dirhtml builder
+    let dirname = docName + "/";
+    if (dirname.match(/\/index\/$/))
+      dirname = dirname.substring(0, dirname.length - 6);
+    else if (dirname === "index/") dirname = "";
+    requestUrl = docUrlRoot + dirname;
+    linkUrl = requestUrl;
+  } else {
+    // normal html builders
+    requestUrl = docUrlRoot + docName + docFileSuffix;
+    linkUrl = docName + docLinkSuffix;
+  }
+  let linkEl = listItem.appendChild(document.createElement("a"));
+  linkEl.href = linkUrl + anchor;
+  linkEl.dataset.score = score;
+  linkEl.innerHTML = title;
+  if (descr)
+    listItem.appendChild(document.createElement("span")).innerHTML =
+      " (" + descr + ")";
+  else if (showSearchSummary)
+    fetch(requestUrl)
+      .then((responseData) => responseData.text())
+      .then((data) => {
+        if (data)
+          listItem.appendChild(
+            Search.makeSearchSummary(data, searchTerms)
+          );
+      });
+  Search.output.appendChild(listItem);
+};
+const _finishSearch = (resultCount) => {
+  Search.stopPulse();
+  Search.title.innerText = _("Search Results");
+  if (!resultCount)
+    Search.status.innerText = Documentation.gettext(
+      "Your search did not match any documents. Please make sure that all words are spelled correctly and that you've selected enough categories."
+    );
+  else
+    Search.status.innerText = _(
+      `Search finished, found ${resultCount} page(s) matching the search query.`
+    );
+};
+const _displayNextItem = (
+  results,
+  resultCount,
+  searchTerms
+) => {
+  // results left, load the summary and display it
+  // this is intended to be dynamic (don't sub resultsCount)
+  if (results.length) {
+    _displayItem(results.pop(), searchTerms);
+    setTimeout(
+      () => _displayNextItem(results, resultCount, searchTerms),
+      5
+    );
+  }
+  // search finished, update title and status message
+  else _finishSearch(resultCount);
+};
+
+/**
+ * Default splitQuery function. Can be overridden in ``sphinx.search`` with a
+ * custom function per language.
+ *
+ * The regular expression works by splitting the string on consecutive characters
+ * that are not Unicode letters, numbers, underscores, or emoji characters.
+ * This is the same as ``\W+`` in Python, preserving the surrogate pair area.
+ */
+if (typeof splitQuery === "undefined") {
+  var splitQuery = (query) => query
+      .split(/[^\p{Letter}\p{Number}_\p{Emoji_Presentation}]+/gu)
+      .filter(term => term)  // remove remaining empty strings
+}
+
+/**
+ * Search Module
+ */
+const Search = {
+  _index: null,
+  _queued_query: null,
+  _pulse_status: -1,
+
+  htmlToText: (htmlString) => {
+    const htmlElement = new DOMParser().parseFromString(htmlString, 'text/html');
+    htmlElement.querySelectorAll(".headerlink").forEach((el) => { el.remove() });
+    const docContent = htmlElement.querySelector('[role="main"]');
+    if (docContent !== undefined) return docContent.textContent;
+    console.warn(
+      "Content block not found. Sphinx search tries to obtain it via '[role=main]'. Could you check your theme or template."
+    );
+    return "";
+  },
+
+  init: () => {
+    const query = new URLSearchParams(window.location.search).get("q");
+    document
+      .querySelectorAll('input[name="q"]')
+      .forEach((el) => (el.value = query));
+    if (query) Search.performSearch(query);
+  },
+
+  loadIndex: (url) =>
+    (document.body.appendChild(document.createElement("script")).src = url),
+
+  setIndex: (index) => {
+    Search._index = index;
+    if (Search._queued_query !== null) {
+      const query = Search._queued_query;
+      Search._queued_query = null;
+      Search.query(query);
+    }
+  },
+
+  hasIndex: () => Search._index !== null,
+
+  deferQuery: (query) => (Search._queued_query = query),
+
+  stopPulse: () => (Search._pulse_status = -1),
+
+  startPulse: () => {
+    if (Search._pulse_status >= 0) return;
+
+    const pulse = () => {
+      Search._pulse_status = (Search._pulse_status + 1) % 4;
+      Search.dots.innerText = ".".repeat(Search._pulse_status);
+      if (Search._pulse_status >= 0) window.setTimeout(pulse, 500);
+    };
+    pulse();
+  },
+
+  /**
+   * perform a search for something (or wait until index is loaded)
+   */
+  performSearch: (query) => {
+    // create the required interface elements
+    const searchText = document.createElement("h2");
+    searchText.textContent = _("Searching");
+    const searchSummary = document.createElement("p");
+    searchSummary.classList.add("search-summary");
+    searchSummary.innerText = "";
+    const searchList = document.createElement("ul");
+    searchList.classList.add("search");
+
+    const out = document.getElementById("search-results");
+    Search.title = out.appendChild(searchText);
+    Search.dots = Search.title.appendChild(document.createElement("span"));
+    Search.status = out.appendChild(searchSummary);
+    Search.output = out.appendChild(searchList);
+
+    const searchProgress = document.getElementById("search-progress");
+    // Some themes don't use the search progress node
+    if (searchProgress) {
+      searchProgress.innerText = _("Preparing search...");
+    }
+    Search.startPulse();
+
+    // index already loaded, the browser was quick!
+    if (Search.hasIndex()) Search.query(query);
+    else Search.deferQuery(query);
+  },
+
+  /**
+   * execute search (requires search index to be loaded)
+   */
+  query: (query) => {
+    const filenames = Search._index.filenames;
+    const docNames = Search._index.docnames;
+    const titles = Search._index.titles;
+    const allTitles = Search._index.alltitles;
+    const indexEntries = Search._index.indexentries;
+
+    // stem the search terms and add them to the correct list
+    const stemmer = new Stemmer();
+    const searchTerms = new Set();
+    const excludedTerms = new Set();
+    const highlightTerms = new Set();
+    const objectTerms = new Set(splitQuery(query.toLowerCase().trim()));
+    splitQuery(query.trim()).forEach((queryTerm) => {
+      const queryTermLower = queryTerm.toLowerCase();
+
+      // maybe skip this "word"
+      // stopwords array is from language_data.js
+      if (
+        stopwords.indexOf(queryTermLower) !== -1 ||
+        queryTerm.match(/^\d+$/)
+      )
+        return;
+
+      // stem the word
+      let word = stemmer.stemWord(queryTermLower);
+      // select the correct list
+      if (word[0] === "-") excludedTerms.add(word.substr(1));
+      else {
+        searchTerms.add(word);
+        highlightTerms.add(queryTermLower);
+      }
+    });
+
+    if (SPHINX_HIGHLIGHT_ENABLED) {  // set in sphinx_highlight.js
+      localStorage.setItem("sphinx_highlight_terms", [...highlightTerms].join(" "))
+    }
+
+    // console.debug("SEARCH: searching for:");
+    // console.info("required: ", [...searchTerms]);
+    // console.info("excluded: ", [...excludedTerms]);
+
+    // array of [docname, title, anchor, descr, score, filename]
+    let results = [];
+    _removeChildren(document.getElementById("search-progress"));
+
+    const queryLower = query.toLowerCase();
+    for (const [title, foundTitles] of Object.entries(allTitles)) {
+      if (title.toLowerCase().includes(queryLower) && (queryLower.length >= title.length/2)) {
+        for (const [file, id] of foundTitles) {
+          let score = Math.round(100 * queryLower.length / title.length)
+          results.push([
+            docNames[file],
+            titles[file] !== title ? `${titles[file]} > ${title}` : title,
+            id !== null ? "#" + id : "",
+            null,
+            score,
+            filenames[file],
+          ]);
+        }
+      }
+    }
+
+    // search for explicit entries in index directives
+    for (const [entry, foundEntries] of Object.entries(indexEntries)) {
+      if (entry.includes(queryLower) && (queryLower.length >= entry.length/2)) {
+        for (const [file, id] of foundEntries) {
+          let score = Math.round(100 * queryLower.length / entry.length)
+          results.push([
+            docNames[file],
+            titles[file],
+            id ? "#" + id : "",
+            null,
+            score,
+            filenames[file],
+          ]);
+        }
+      }
+    }
+
+    // lookup as object
+    objectTerms.forEach((term) =>
+      results.push(...Search.performObjectSearch(term, objectTerms))
+    );
+
+    // lookup as search terms in fulltext
+    results.push(...Search.performTermsSearch(searchTerms, excludedTerms));
+
+    // let the scorer override scores with a custom scoring function
+    if (Scorer.score) results.forEach((item) => (item[4] = Scorer.score(item)));
+
+    // now sort the results by score (in opposite order of appearance, since the
+    // display function below uses pop() to retrieve items) and then
+    // alphabetically
+    results.sort((a, b) => {
+      const leftScore = a[4];
+      const rightScore = b[4];
+      if (leftScore === rightScore) {
+        // same score: sort alphabetically
+        const leftTitle = a[1].toLowerCase();
+        const rightTitle = b[1].toLowerCase();
+        if (leftTitle === rightTitle) return 0;
+        return leftTitle > rightTitle ? -1 : 1; // inverted is intentional
+      }
+      return leftScore > rightScore ? 1 : -1;
+    });
+
+    // remove duplicate search results
+    // note the reversing of results, so that in the case of duplicates, the highest-scoring entry is kept
+    let seen = new Set();
+    results = results.reverse().reduce((acc, result) => {
+      let resultStr = result.slice(0, 4).concat([result[5]]).map(v => String(v)).join(',');
+      if (!seen.has(resultStr)) {
+        acc.push(result);
+        seen.add(resultStr);
+      }
+      return acc;
+    }, []);
+
+    results = results.reverse();
+
+    // for debugging
+    //Search.lastresults = results.slice();  // a copy
+    // console.info("search results:", Search.lastresults);
+
+    // print the results
+    _displayNextItem(results, results.length, searchTerms);
+  },
+
+  /**
+   * search for object names
+   */
+  performObjectSearch: (object, objectTerms) => {
+    const filenames = Search._index.filenames;
+    const docNames = Search._index.docnames;
+    const objects = Search._index.objects;
+    const objNames = Search._index.objnames;
+    const titles = Search._index.titles;
+
+    const results = [];
+
+    const objectSearchCallback = (prefix, match) => {
+      const name = match[4]
+      const fullname = (prefix ? prefix + "." : "") + name;
+      const fullnameLower = fullname.toLowerCase();
+      if (fullnameLower.indexOf(object) < 0) return;
+
+      let score = 0;
+      const parts = fullnameLower.split(".");
+
+      // check for different match types: exact matches of full name or
+      // "last name" (i.e. last dotted part)
+      if (fullnameLower === object || parts.slice(-1)[0] === object)
+        score += Scorer.objNameMatch;
+      else if (parts.slice(-1)[0].indexOf(object) > -1)
+        score += Scorer.objPartialMatch; // matches in last name
+
+      const objName = objNames[match[1]][2];
+      const title = titles[match[0]];
+
+      // If more than one term searched for, we require other words to be
+      // found in the name/title/description
+      const otherTerms = new Set(objectTerms);
+      otherTerms.delete(object);
+      if (otherTerms.size > 0) {
+        const haystack = `${prefix} ${name} ${objName} ${title}`.toLowerCase();
+        if (
+          [...otherTerms].some((otherTerm) => haystack.indexOf(otherTerm) < 0)
+        )
+          return;
+      }
+
+      let anchor = match[3];
+      if (anchor === "") anchor = fullname;
+      else if (anchor === "-") anchor = objNames[match[1]][1] + "-" + fullname;
+
+      const descr = objName + _(", in ") + title;
+
+      // add custom score for some objects according to scorer
+      if (Scorer.objPrio.hasOwnProperty(match[2]))
+        score += Scorer.objPrio[match[2]];
+      else score += Scorer.objPrioDefault;
+
+      results.push([
+        docNames[match[0]],
+        fullname,
+        "#" + anchor,
+        descr,
+        score,
+        filenames[match[0]],
+      ]);
+    };
+    Object.keys(objects).forEach((prefix) =>
+      objects[prefix].forEach((array) =>
+        objectSearchCallback(prefix, array)
+      )
+    );
+    return results;
+  },
+
+  /**
+   * search for full-text terms in the index
+   */
+  performTermsSearch: (searchTerms, excludedTerms) => {
+    // prepare search
+    const terms = Search._index.terms;
+    const titleTerms = Search._index.titleterms;
+    const filenames = Search._index.filenames;
+    const docNames = Search._index.docnames;
+    const titles = Search._index.titles;
+
+    const scoreMap = new Map();
+    const fileMap = new Map();
+
+    // perform the search on the required terms
+    searchTerms.forEach((word) => {
+      const files = [];
+      const arr = [
+        { files: terms[word], score: Scorer.term },
+        { files: titleTerms[word], score: Scorer.title },
+      ];
+      // add support for partial matches
+      if (word.length > 2) {
+        const escapedWord = _escapeRegExp(word);
+        Object.keys(terms).forEach((term) => {
+          if (term.match(escapedWord) && !terms[word])
+            arr.push({ files: terms[term], score: Scorer.partialTerm });
+        });
+        Object.keys(titleTerms).forEach((term) => {
+          if (term.match(escapedWord) && !titleTerms[word])
+            arr.push({ files: titleTerms[word], score: Scorer.partialTitle });
+        });
+      }
+
+      // no match but word was a required one
+      if (arr.every((record) => record.files === undefined)) return;
+
+      // found search word in contents
+      arr.forEach((record) => {
+        if (record.files === undefined) return;
+
+        let recordFiles = record.files;
+        if (recordFiles.length === undefined) recordFiles = [recordFiles];
+        files.push(...recordFiles);
+
+        // set score for the word in each file
+        recordFiles.forEach((file) => {
+          if (!scoreMap.has(file)) scoreMap.set(file, {});
+          scoreMap.get(file)[word] = record.score;
+        });
+      });
+
+      // create the mapping
+      files.forEach((file) => {
+        if (fileMap.has(file) && fileMap.get(file).indexOf(word) === -1)
+          fileMap.get(file).push(word);
+        else fileMap.set(file, [word]);
+      });
+    });
+
+    // now check if the files don't contain excluded terms
+    const results = [];
+    for (const [file, wordList] of fileMap) {
+      // check if all requirements are matched
+
+      // as search terms with length < 3 are discarded
+      const filteredTermCount = [...searchTerms].filter(
+        (term) => term.length > 2
+      ).length;
+      if (
+        wordList.length !== searchTerms.size &&
+        wordList.length !== filteredTermCount
+      )
+        continue;
+
+      // ensure that none of the excluded terms is in the search result
+      if (
+        [...excludedTerms].some(
+          (term) =>
+            terms[term] === file ||
+            titleTerms[term] === file ||
+            (terms[term] || []).includes(file) ||
+            (titleTerms[term] || []).includes(file)
+        )
+      )
+        break;
+
+      // select one (max) score for the file.
+      const score = Math.max(...wordList.map((w) => scoreMap.get(file)[w]));
+      // add result to the result list
+      results.push([
+        docNames[file],
+        titles[file],
+        "",
+        null,
+        score,
+        filenames[file],
+      ]);
+    }
+    return results;
+  },
+
+  /**
+   * helper function to return a node containing the
+   * search summary for a given text. keywords is a list
+   * of stemmed words.
+   */
+  makeSearchSummary: (htmlText, keywords) => {
+    const text = Search.htmlToText(htmlText);
+    if (text === "") return null;
+
+    const textLower = text.toLowerCase();
+    const actualStartPosition = [...keywords]
+      .map((k) => textLower.indexOf(k.toLowerCase()))
+      .filter((i) => i > -1)
+      .slice(-1)[0];
+    const startWithContext = Math.max(actualStartPosition - 120, 0);
+
+    const top = startWithContext === 0 ? "" : "...";
+    const tail = startWithContext + 240 < text.length ? "..." : "";
+
+    let summary = document.createElement("p");
+    summary.classList.add("context");
+    summary.textContent = top + text.substr(startWithContext, 240).trim() + tail;
+
+    return summary;
+  },
+};
+
+_ready(Search.init);

gateware/liteeth/doc/_build/html/_static/sphinx_highlight.js

@@ -0,0 +1,144 @@
+/* Highlighting utilities for Sphinx HTML documentation. */
+"use strict";
+
+const SPHINX_HIGHLIGHT_ENABLED = true
+
+/**
+ * highlight a given string on a node by wrapping it in
+ * span elements with the given class name.
+ */
+const _highlight = (node, addItems, text, className) => {
+  if (node.nodeType === Node.TEXT_NODE) {
+    const val = node.nodeValue;
+    const parent = node.parentNode;
+    const pos = val.toLowerCase().indexOf(text);
+    if (
+      pos >= 0 &&
+      !parent.classList.contains(className) &&
+      !parent.classList.contains("nohighlight")
+    ) {
+      let span;
+
+      const closestNode = parent.closest("body, svg, foreignObject");
+      const isInSVG = closestNode && closestNode.matches("svg");
+      if (isInSVG) {
+        span = document.createElementNS("http://www.w3.org/2000/svg", "tspan");
+      } else {
+        span = document.createElement("span");
+        span.classList.add(className);
+      }
+
+      span.appendChild(document.createTextNode(val.substr(pos, text.length)));
+      parent.insertBefore(
+        span,
+        parent.insertBefore(
+          document.createTextNode(val.substr(pos + text.length)),
+          node.nextSibling
+        )
+      );
+      node.nodeValue = val.substr(0, pos);
+
+      if (isInSVG) {
+        const rect = document.createElementNS(
+          "http://www.w3.org/2000/svg",
+          "rect"
+        );
+        const bbox = parent.getBBox();
+        rect.x.baseVal.value = bbox.x;
+        rect.y.baseVal.value = bbox.y;
+        rect.width.baseVal.value = bbox.width;
+        rect.height.baseVal.value = bbox.height;
+        rect.setAttribute("class", className);
+        addItems.push({ parent: parent, target: rect });
+      }
+    }
+  } else if (node.matches && !node.matches("button, select, textarea")) {
+    node.childNodes.forEach((el) => _highlight(el, addItems, text, className));
+  }
+};
+const _highlightText = (thisNode, text, className) => {
+  let addItems = [];
+  _highlight(thisNode, addItems, text, className);
+  addItems.forEach((obj) =>
+    obj.parent.insertAdjacentElement("beforebegin", obj.target)
+  );
+};
+
+/**
+ * Small JavaScript module for the documentation.
+ */
+const SphinxHighlight = {
+
+  /**
+   * highlight the search words provided in localstorage in the text
+   */
+  highlightSearchWords: () => {
+    if (!SPHINX_HIGHLIGHT_ENABLED) return;  // bail if no highlight
+
+    // get and clear terms from localstorage
+    const url = new URL(window.location);
+    const highlight =
+        localStorage.getItem("sphinx_highlight_terms")
+        || url.searchParams.get("highlight")
+        || "";
+    localStorage.removeItem("sphinx_highlight_terms")
+    url.searchParams.delete("highlight");
+    window.history.replaceState({}, "", url);
+
+    // get individual terms from highlight string
+    const terms = highlight.toLowerCase().split(/\s+/).filter(x => x);
+    if (terms.length === 0) return; // nothing to do
+
+    // There should never be more than one element matching "div.body"
+    const divBody = document.querySelectorAll("div.body");
+    const body = divBody.length ? divBody[0] : document.querySelector("body");
+    window.setTimeout(() => {
+      terms.forEach((term) => _highlightText(body, term, "highlighted"));
+    }, 10);
+
+    const searchBox = document.getElementById("searchbox");
+    if (searchBox === null) return;
+    searchBox.appendChild(
+      document
+        .createRange()
+        .createContextualFragment(
+          '<p class="highlight-link">' +
+            '<a href="javascript:SphinxHighlight.hideSearchWords()">' +
+            _("Hide Search Matches") +
+            "</a></p>"
+        )
+    );
+  },
+
+  /**
+   * helper function to hide the search marks again
+   */
+  hideSearchWords: () => {
+    document
+      .querySelectorAll("#searchbox .highlight-link")
+      .forEach((el) => el.remove());
+    document
+      .querySelectorAll("span.highlighted")
+      .forEach((el) => el.classList.remove("highlighted"));
+    localStorage.removeItem("sphinx_highlight_terms")
+  },
+
+  initEscapeListener: () => {
+    // only install a listener if it is really needed
+    if (!DOCUMENTATION_OPTIONS.ENABLE_SEARCH_SHORTCUTS) return;
+
+    document.addEventListener("keydown", (event) => {
+      // bail for input elements
+      if (BLACKLISTED_KEY_CONTROL_ELEMENTS.has(document.activeElement.tagName)) return;
+      // bail with special keys
+      if (event.shiftKey || event.altKey || event.ctrlKey || event.metaKey) return;
+      if (DOCUMENTATION_OPTIONS.ENABLE_SEARCH_SHORTCUTS && (event.key === "Escape")) {
+        SphinxHighlight.hideSearchWords();
+        event.preventDefault();
+      }
+    });
+  },
+};
+
+_ready(SphinxHighlight.highlightSearchWords);
+_ready(SphinxHighlight.initEscapeListener);

gateware/liteeth/doc/_build/html/ctrl.html

@@ -0,0 +1,213 @@
+
+<!DOCTYPE html>
+
+<html lang="en">
+  <head>
+    <meta charset="utf-8" />
+    <meta name="viewport" content="width=device-width, initial-scale=1.0" /><meta name="generator" content="Docutils 0.19: https://docutils.sourceforge.io/" />
+
+    <title>CTRL &#8212; LiteX SoC Project  documentation</title>
+    <link rel="stylesheet" type="text/css" href="_static/pygments.css" />
+    <link rel="stylesheet" type="text/css" href="_static/alabaster.css" />
+    <script data-url_root="./" id="documentation_options" src="_static/documentation_options.js"></script>
+    <script src="_static/doctools.js"></script>
+    <script src="_static/sphinx_highlight.js"></script>
+    <script src="_static/default.js"></script>
+    <script src="_static/WaveDrom.js"></script>
+    <link rel="index" title="Index" href="genindex.html" />
+    <link rel="search" title="Search" href="search.html" />
+    <link rel="next" title="ETHMAC" href="ethmac.html" />
+    <link rel="prev" title="Interrupt Controller" href="interrupts.html" />
+   
+  <link rel="stylesheet" href="_static/custom.css" type="text/css" />
+  
+  
+  <meta name="viewport" content="width=device-width, initial-scale=0.9, maximum-scale=0.9" />
+
+  </head><body>
+  
+
+    <div class="document">
+      <div class="documentwrapper">
+        <div class="bodywrapper">
+          
+
+          <div class="body" role="main">
+            
+  <section id="ctrl">
+<h1>CTRL<a class="headerlink" href="#ctrl" title="Permalink to this heading">¶</a></h1>
+<section id="register-listing-for-ctrl">
+<h2>Register Listing for CTRL<a class="headerlink" href="#register-listing-for-ctrl" title="Permalink to this heading">¶</a></h2>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Register</p></th>
+<th class="head"><p>Address</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p><a class="reference internal" href="#ctrl-reset"><span class="std std-ref">CTRL_RESET</span></a></p></td>
+<td><p><a class="reference internal" href="#ctrl-reset"><span class="std std-ref">0x00000000</span></a></p></td>
+</tr>
+<tr class="row-odd"><td><p><a class="reference internal" href="#ctrl-scratch"><span class="std std-ref">CTRL_SCRATCH</span></a></p></td>
+<td><p><a class="reference internal" href="#ctrl-scratch"><span class="std std-ref">0x00000004</span></a></p></td>
+</tr>
+<tr class="row-even"><td><p><a class="reference internal" href="#ctrl-bus-errors"><span class="std std-ref">CTRL_BUS_ERRORS</span></a></p></td>
+<td><p><a class="reference internal" href="#ctrl-bus-errors"><span class="std std-ref">0x00000008</span></a></p></td>
+</tr>
+</tbody>
+</table>
+<section id="ctrl-reset">
+<h3>CTRL_RESET<a class="headerlink" href="#ctrl-reset" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000000 + 0x0 = 0x00000000</cite></p>
+<blockquote>
+<div>
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "soc_rst",  "type": 4, "bits": 1},
+        {"name": "cpu_rst",  "bits": 1},
+        {"bits": 30}
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+}
+</script>
+</div>
+</div></blockquote>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Field</p></th>
+<th class="head"><p>Name</p></th>
+<th class="head"><p>Description</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>[0]</p></td>
+<td><p>SOC_RST</p></td>
+<td><p>Write <cite>1</cite> to this register to reset the full SoC (Pulse Reset)</p></td>
+</tr>
+<tr class="row-odd"><td><p>[1]</p></td>
+<td><p>CPU_RST</p></td>
+<td><p>Write <cite>1</cite> to this register to reset the CPU(s) of the SoC (Hold Reset)</p></td>
+</tr>
+</tbody>
+</table>
+</section>
+<section id="ctrl-scratch">
+<h3>CTRL_SCRATCH<a class="headerlink" href="#ctrl-scratch" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000000 + 0x4 = 0x00000004</cite></p>
+<blockquote>
+<div><p>Use this register as a scratch space to verify that software read/write accesses
+to the Wishbone/CSR bus are working correctly. The initial reset value of
+0x1234578 can be used to verify endianness.</p>
+
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "scratch[31:0]", "attr": 'reset: 305419896', "bits": 32}
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+}
+</script>
+</div>
+</div></blockquote>
+</section>
+<section id="ctrl-bus-errors">
+<h3>CTRL_BUS_ERRORS<a class="headerlink" href="#ctrl-bus-errors" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000000 + 0x8 = 0x00000008</cite></p>
+<blockquote>
+<div><p>Total number of Wishbone bus errors (timeouts) since start.</p>
+
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "bus_errors[31:0]", "bits": 32}
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+}
+</script>
+</div>
+</div></blockquote>
+</section>
+</section>
+</section>
+
+    <script type="text/javascript">
+        function init() {
+            WaveDrom.ProcessAll();
+        }
+        window.onload = init;
+    </script>
+
+          </div>
+          
+        </div>
+      </div>
+      <div class="sphinxsidebar" role="navigation" aria-label="main navigation">
+        <div class="sphinxsidebarwrapper">
+<h1 class="logo"><a href="index.html">LiteX SoC Project</a></h1>
+
+
+
+
+
+
+
+
+<h3>Navigation</h3>
+<ul>
+<li class="toctree-l1"><a class="reference internal" href="interrupts.html">Interrupt Controller</a></li>
+</ul>
+<ul class="current">
+<li class="toctree-l1 current"><a class="current reference internal" href="#">CTRL</a></li>
+<li class="toctree-l1"><a class="reference internal" href="ethmac.html">ETHMAC</a></li>
+<li class="toctree-l1"><a class="reference internal" href="ethphy.html">ETHPHY</a></li>
+</ul>
+
+<div class="relations">
+<h3>Related Topics</h3>
+<ul>
+  <li><a href="index.html">Documentation overview</a><ul>
+      <li>Previous: <a href="interrupts.html" title="previous chapter">Interrupt Controller</a></li>
+      <li>Next: <a href="ethmac.html" title="next chapter">ETHMAC</a></li>
+  </ul></li>
+</ul>
+</div>
+<div id="searchbox" style="display: none" role="search">
+  <h3 id="searchlabel">Quick search</h3>
+    <div class="searchformwrapper">
+    <form class="search" action="search.html" method="get">
+      <input type="text" name="q" aria-labelledby="searchlabel" autocomplete="off" autocorrect="off" autocapitalize="off" spellcheck="false"/>
+      <input type="submit" value="Go" />
+    </form>
+    </div>
+</div>
+<script>document.getElementById('searchbox').style.display = "block"</script>
+
+
+
+
+
+
+
+
+        </div>
+      </div>
+      <div class="clearer"></div>
+    </div>
+    <div class="footer">
+      &copy;2023, Anonymous.
+      
+      |
+      Powered by <a href="http://sphinx-doc.org/">Sphinx 6.1.3</a>
+      &amp; <a href="https://github.com/bitprophet/alabaster">Alabaster 0.7.13</a>
+      
+      |
+      <a href="_sources/ctrl.rst.txt"
+          rel="nofollow">Page source</a>
+    </div>
+
+    
+
+    
+  </body>
+</html>

gateware/liteeth/doc/_build/html/ethmac.html

@@ -0,0 +1,567 @@
+
+<!DOCTYPE html>
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+            
+  <section id="ethmac">
+<h1>ETHMAC<a class="headerlink" href="#ethmac" title="Permalink to this heading">¶</a></h1>
+<section id="register-listing-for-ethmac">
+<h2>Register Listing for ETHMAC<a class="headerlink" href="#register-listing-for-ethmac" title="Permalink to this heading">¶</a></h2>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Register</p></th>
+<th class="head"><p>Address</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p><a class="reference internal" href="#ethmac-sram-writer-slot"><span class="std std-ref">ETHMAC_SRAM_WRITER_SLOT</span></a></p></td>
+<td><p><a class="reference internal" href="#ethmac-sram-writer-slot"><span class="std std-ref">0x00000800</span></a></p></td>
+</tr>
+<tr class="row-odd"><td><p><a class="reference internal" href="#ethmac-sram-writer-length"><span class="std std-ref">ETHMAC_SRAM_WRITER_LENGTH</span></a></p></td>
+<td><p><a class="reference internal" href="#ethmac-sram-writer-length"><span class="std std-ref">0x00000804</span></a></p></td>
+</tr>
+<tr class="row-even"><td><p><a class="reference internal" href="#ethmac-sram-writer-errors"><span class="std std-ref">ETHMAC_SRAM_WRITER_ERRORS</span></a></p></td>
+<td><p><a class="reference internal" href="#ethmac-sram-writer-errors"><span class="std std-ref">0x00000808</span></a></p></td>
+</tr>
+<tr class="row-odd"><td><p><a class="reference internal" href="#ethmac-sram-writer-ev-status"><span class="std std-ref">ETHMAC_SRAM_WRITER_EV_STATUS</span></a></p></td>
+<td><p><a class="reference internal" href="#ethmac-sram-writer-ev-status"><span class="std std-ref">0x0000080c</span></a></p></td>
+</tr>
+<tr class="row-even"><td><p><a class="reference internal" href="#ethmac-sram-writer-ev-pending"><span class="std std-ref">ETHMAC_SRAM_WRITER_EV_PENDING</span></a></p></td>
+<td><p><a class="reference internal" href="#ethmac-sram-writer-ev-pending"><span class="std std-ref">0x00000810</span></a></p></td>
+</tr>
+<tr class="row-odd"><td><p><a class="reference internal" href="#ethmac-sram-writer-ev-enable"><span class="std std-ref">ETHMAC_SRAM_WRITER_EV_ENABLE</span></a></p></td>
+<td><p><a class="reference internal" href="#ethmac-sram-writer-ev-enable"><span class="std std-ref">0x00000814</span></a></p></td>
+</tr>
+<tr class="row-even"><td><p><a class="reference internal" href="#ethmac-sram-reader-start"><span class="std std-ref">ETHMAC_SRAM_READER_START</span></a></p></td>
+<td><p><a class="reference internal" href="#ethmac-sram-reader-start"><span class="std std-ref">0x00000818</span></a></p></td>
+</tr>
+<tr class="row-odd"><td><p><a class="reference internal" href="#ethmac-sram-reader-ready"><span class="std std-ref">ETHMAC_SRAM_READER_READY</span></a></p></td>
+<td><p><a class="reference internal" href="#ethmac-sram-reader-ready"><span class="std std-ref">0x0000081c</span></a></p></td>
+</tr>
+<tr class="row-even"><td><p><a class="reference internal" href="#ethmac-sram-reader-level"><span class="std std-ref">ETHMAC_SRAM_READER_LEVEL</span></a></p></td>
+<td><p><a class="reference internal" href="#ethmac-sram-reader-level"><span class="std std-ref">0x00000820</span></a></p></td>
+</tr>
+<tr class="row-odd"><td><p><a class="reference internal" href="#ethmac-sram-reader-slot"><span class="std std-ref">ETHMAC_SRAM_READER_SLOT</span></a></p></td>
+<td><p><a class="reference internal" href="#ethmac-sram-reader-slot"><span class="std std-ref">0x00000824</span></a></p></td>
+</tr>
+<tr class="row-even"><td><p><a class="reference internal" href="#ethmac-sram-reader-length"><span class="std std-ref">ETHMAC_SRAM_READER_LENGTH</span></a></p></td>
+<td><p><a class="reference internal" href="#ethmac-sram-reader-length"><span class="std std-ref">0x00000828</span></a></p></td>
+</tr>
+<tr class="row-odd"><td><p><a class="reference internal" href="#ethmac-sram-reader-ev-status"><span class="std std-ref">ETHMAC_SRAM_READER_EV_STATUS</span></a></p></td>
+<td><p><a class="reference internal" href="#ethmac-sram-reader-ev-status"><span class="std std-ref">0x0000082c</span></a></p></td>
+</tr>
+<tr class="row-even"><td><p><a class="reference internal" href="#ethmac-sram-reader-ev-pending"><span class="std std-ref">ETHMAC_SRAM_READER_EV_PENDING</span></a></p></td>
+<td><p><a class="reference internal" href="#ethmac-sram-reader-ev-pending"><span class="std std-ref">0x00000830</span></a></p></td>
+</tr>
+<tr class="row-odd"><td><p><a class="reference internal" href="#ethmac-sram-reader-ev-enable"><span class="std std-ref">ETHMAC_SRAM_READER_EV_ENABLE</span></a></p></td>
+<td><p><a class="reference internal" href="#ethmac-sram-reader-ev-enable"><span class="std std-ref">0x00000834</span></a></p></td>
+</tr>
+<tr class="row-even"><td><p><a class="reference internal" href="#ethmac-preamble-crc"><span class="std std-ref">ETHMAC_PREAMBLE_CRC</span></a></p></td>
+<td><p><a class="reference internal" href="#ethmac-preamble-crc"><span class="std std-ref">0x00000838</span></a></p></td>
+</tr>
+<tr class="row-odd"><td><p><a class="reference internal" href="#ethmac-rx-datapath-preamble-errors"><span class="std std-ref">ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS</span></a></p></td>
+<td><p><a class="reference internal" href="#ethmac-rx-datapath-preamble-errors"><span class="std std-ref">0x0000083c</span></a></p></td>
+</tr>
+<tr class="row-even"><td><p><a class="reference internal" href="#ethmac-rx-datapath-crc-errors"><span class="std std-ref">ETHMAC_RX_DATAPATH_CRC_ERRORS</span></a></p></td>
+<td><p><a class="reference internal" href="#ethmac-rx-datapath-crc-errors"><span class="std std-ref">0x00000840</span></a></p></td>
+</tr>
+</tbody>
+</table>
+<section id="ethmac-sram-writer-slot">
+<h3>ETHMAC_SRAM_WRITER_SLOT<a class="headerlink" href="#ethmac-sram-writer-slot" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000800 + 0x0 = 0x00000800</cite></p>
+<blockquote>
+<div>
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "sram_writer_slot", "bits": 1},
+        {"bits": 31},
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+}
+</script>
+</div>
+</div></blockquote>
+</section>
+<section id="ethmac-sram-writer-length">
+<h3>ETHMAC_SRAM_WRITER_LENGTH<a class="headerlink" href="#ethmac-sram-writer-length" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000800 + 0x4 = 0x00000804</cite></p>
+<blockquote>
+<div>
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "sram_writer_length[10:0]", "bits": 11},
+        {"bits": 21},
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+}
+</script>
+</div>
+</div></blockquote>
+</section>
+<section id="ethmac-sram-writer-errors">
+<h3>ETHMAC_SRAM_WRITER_ERRORS<a class="headerlink" href="#ethmac-sram-writer-errors" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000800 + 0x8 = 0x00000808</cite></p>
+<blockquote>
+<div>
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "sram_writer_errors[31:0]", "bits": 32}
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+}
+</script>
+</div>
+</div></blockquote>
+</section>
+<section id="ethmac-sram-writer-ev-status">
+<h3>ETHMAC_SRAM_WRITER_EV_STATUS<a class="headerlink" href="#ethmac-sram-writer-ev-status" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000800 + 0xc = 0x0000080c</cite></p>
+<blockquote>
+<div><p>This register contains the current raw level of the available event trigger.
+Writes to this register have no effect.</p>
+
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "available",  "bits": 1},
+        {"bits": 31}
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+}
+</script>
+</div>
+</div></blockquote>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Field</p></th>
+<th class="head"><p>Name</p></th>
+<th class="head"><p>Description</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>[0]</p></td>
+<td><p>AVAILABLE</p></td>
+<td><p>Level of the <code class="docutils literal notranslate"><span class="pre">available</span></code> event</p></td>
+</tr>
+</tbody>
+</table>
+</section>
+<section id="ethmac-sram-writer-ev-pending">
+<h3>ETHMAC_SRAM_WRITER_EV_PENDING<a class="headerlink" href="#ethmac-sram-writer-ev-pending" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000800 + 0x10 = 0x00000810</cite></p>
+<blockquote>
+<div><p>When a  available event occurs, the corresponding bit will be set in this
+register.  To clear the Event, set the corresponding bit in this register.</p>
+
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "available",  "bits": 1},
+        {"bits": 31}
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+}
+</script>
+</div>
+</div></blockquote>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Field</p></th>
+<th class="head"><p>Name</p></th>
+<th class="head"><p>Description</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>[0]</p></td>
+<td><p>AVAILABLE</p></td>
+<td><p><cite>1</cite> if a <cite>available</cite> event occurred. This Event is <strong>level triggered</strong> when the
+signal is <strong>high</strong>.</p></td>
+</tr>
+</tbody>
+</table>
+</section>
+<section id="ethmac-sram-writer-ev-enable">
+<h3>ETHMAC_SRAM_WRITER_EV_ENABLE<a class="headerlink" href="#ethmac-sram-writer-ev-enable" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000800 + 0x14 = 0x00000814</cite></p>
+<blockquote>
+<div><p>This register enables the corresponding available events.  Write a <code class="docutils literal notranslate"><span class="pre">0</span></code> to this
+register to disable individual events.</p>
+
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "available",  "bits": 1},
+        {"bits": 31}
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+}
+</script>
+</div>
+</div></blockquote>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Field</p></th>
+<th class="head"><p>Name</p></th>
+<th class="head"><p>Description</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>[0]</p></td>
+<td><p>AVAILABLE</p></td>
+<td><p>Write a <code class="docutils literal notranslate"><span class="pre">1</span></code> to enable the <code class="docutils literal notranslate"><span class="pre">available</span></code> Event</p></td>
+</tr>
+</tbody>
+</table>
+</section>
+<section id="ethmac-sram-reader-start">
+<h3>ETHMAC_SRAM_READER_START<a class="headerlink" href="#ethmac-sram-reader-start" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000800 + 0x18 = 0x00000818</cite></p>
+<blockquote>
+<div>
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "sram_reader_start", "bits": 1},
+        {"bits": 31},
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+}
+</script>
+</div>
+</div></blockquote>
+</section>
+<section id="ethmac-sram-reader-ready">
+<h3>ETHMAC_SRAM_READER_READY<a class="headerlink" href="#ethmac-sram-reader-ready" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000800 + 0x1c = 0x0000081c</cite></p>
+<blockquote>
+<div>
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "sram_reader_ready", "bits": 1},
+        {"bits": 31},
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+}
+</script>
+</div>
+</div></blockquote>
+</section>
+<section id="ethmac-sram-reader-level">
+<h3>ETHMAC_SRAM_READER_LEVEL<a class="headerlink" href="#ethmac-sram-reader-level" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000800 + 0x20 = 0x00000820</cite></p>
+<blockquote>
+<div>
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "sram_reader_level[1:0]", "bits": 2},
+        {"bits": 30},
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+}
+</script>
+</div>
+</div></blockquote>
+</section>
+<section id="ethmac-sram-reader-slot">
+<h3>ETHMAC_SRAM_READER_SLOT<a class="headerlink" href="#ethmac-sram-reader-slot" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000800 + 0x24 = 0x00000824</cite></p>
+<blockquote>
+<div>
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "sram_reader_slot", "bits": 1},
+        {"bits": 31},
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+}
+</script>
+</div>
+</div></blockquote>
+</section>
+<section id="ethmac-sram-reader-length">
+<h3>ETHMAC_SRAM_READER_LENGTH<a class="headerlink" href="#ethmac-sram-reader-length" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000800 + 0x28 = 0x00000828</cite></p>
+<blockquote>
+<div>
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "sram_reader_length[10:0]", "bits": 11},
+        {"bits": 21},
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+}
+</script>
+</div>
+</div></blockquote>
+</section>
+<section id="ethmac-sram-reader-ev-status">
+<h3>ETHMAC_SRAM_READER_EV_STATUS<a class="headerlink" href="#ethmac-sram-reader-ev-status" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000800 + 0x2c = 0x0000082c</cite></p>
+<blockquote>
+<div><p>This register contains the current raw level of the event0 event trigger.
+Writes to this register have no effect.</p>
+
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "event0",  "bits": 1},
+        {"bits": 31}
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+}
+</script>
+</div>
+</div></blockquote>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Field</p></th>
+<th class="head"><p>Name</p></th>
+<th class="head"><p>Description</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>[0]</p></td>
+<td><p>EVENT0</p></td>
+<td><p>Level of the <code class="docutils literal notranslate"><span class="pre">event0</span></code> event</p></td>
+</tr>
+</tbody>
+</table>
+</section>
+<section id="ethmac-sram-reader-ev-pending">
+<h3>ETHMAC_SRAM_READER_EV_PENDING<a class="headerlink" href="#ethmac-sram-reader-ev-pending" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000800 + 0x30 = 0x00000830</cite></p>
+<blockquote>
+<div><p>When a  event0 event occurs, the corresponding bit will be set in this register.
+To clear the Event, set the corresponding bit in this register.</p>
+
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "event0",  "bits": 1},
+        {"bits": 31}
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+}
+</script>
+</div>
+</div></blockquote>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Field</p></th>
+<th class="head"><p>Name</p></th>
+<th class="head"><p>Description</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>[0]</p></td>
+<td><p>EVENT0</p></td>
+<td><p><cite>1</cite> if a this particular event occurred. This Event is triggered on a <strong>rising</strong>
+edge.</p></td>
+</tr>
+</tbody>
+</table>
+</section>
+<section id="ethmac-sram-reader-ev-enable">
+<h3>ETHMAC_SRAM_READER_EV_ENABLE<a class="headerlink" href="#ethmac-sram-reader-ev-enable" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000800 + 0x34 = 0x00000834</cite></p>
+<blockquote>
+<div><p>This register enables the corresponding event0 events.  Write a <code class="docutils literal notranslate"><span class="pre">0</span></code> to this
+register to disable individual events.</p>
+
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "event0",  "bits": 1},
+        {"bits": 31}
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+}
+</script>
+</div>
+</div></blockquote>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Field</p></th>
+<th class="head"><p>Name</p></th>
+<th class="head"><p>Description</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>[0]</p></td>
+<td><p>EVENT0</p></td>
+<td><p>Write a <code class="docutils literal notranslate"><span class="pre">1</span></code> to enable the <code class="docutils literal notranslate"><span class="pre">event0</span></code> Event</p></td>
+</tr>
+</tbody>
+</table>
+</section>
+<section id="ethmac-preamble-crc">
+<h3>ETHMAC_PREAMBLE_CRC<a class="headerlink" href="#ethmac-preamble-crc" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000800 + 0x38 = 0x00000838</cite></p>
+<blockquote>
+<div>
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "preamble_crc", "attr": 'reset: 1', "bits": 1},
+        {"bits": 31},
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+}
+</script>
+</div>
+</div></blockquote>
+</section>
+<section id="ethmac-rx-datapath-preamble-errors">
+<h3>ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS<a class="headerlink" href="#ethmac-rx-datapath-preamble-errors" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000800 + 0x3c = 0x0000083c</cite></p>
+<blockquote>
+<div>
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "rx_datapath_preamble_errors[31:0]", "bits": 32}
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+}
+</script>
+</div>
+</div></blockquote>
+</section>
+<section id="ethmac-rx-datapath-crc-errors">
+<h3>ETHMAC_RX_DATAPATH_CRC_ERRORS<a class="headerlink" href="#ethmac-rx-datapath-crc-errors" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00000800 + 0x40 = 0x00000840</cite></p>
+<blockquote>
+<div>
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "rx_datapath_crc_errors[31:0]", "bits": 32}
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+}
+</script>
+</div>
+</div></blockquote>
+</section>
+</section>
+</section>
+
+    <script type="text/javascript">
+        function init() {
+            WaveDrom.ProcessAll();
+        }
+        window.onload = init;
+    </script>
+
+          </div>
+          
+        </div>
+      </div>
+      <div class="sphinxsidebar" role="navigation" aria-label="main navigation">
+        <div class="sphinxsidebarwrapper">
+<h1 class="logo"><a href="index.html">LiteX SoC Project</a></h1>
+
+
+
+
+
+
+
+
+<h3>Navigation</h3>
+<ul>
+<li class="toctree-l1"><a class="reference internal" href="interrupts.html">Interrupt Controller</a></li>
+</ul>
+<ul class="current">
+<li class="toctree-l1"><a class="reference internal" href="ctrl.html">CTRL</a></li>
+<li class="toctree-l1 current"><a class="current reference internal" href="#">ETHMAC</a></li>
+<li class="toctree-l1"><a class="reference internal" href="ethphy.html">ETHPHY</a></li>
+</ul>
+
+<div class="relations">
+<h3>Related Topics</h3>
+<ul>
+  <li><a href="index.html">Documentation overview</a><ul>
+      <li>Previous: <a href="ctrl.html" title="previous chapter">CTRL</a></li>
+      <li>Next: <a href="ethphy.html" title="next chapter">ETHPHY</a></li>
+  </ul></li>
+</ul>
+</div>
+<div id="searchbox" style="display: none" role="search">
+  <h3 id="searchlabel">Quick search</h3>
+    <div class="searchformwrapper">
+    <form class="search" action="search.html" method="get">
+      <input type="text" name="q" aria-labelledby="searchlabel" autocomplete="off" autocorrect="off" autocapitalize="off" spellcheck="false"/>
+      <input type="submit" value="Go" />
+    </form>
+    </div>
+</div>
+<script>document.getElementById('searchbox').style.display = "block"</script>
+
+
+
+
+
+
+
+
+        </div>
+      </div>
+      <div class="clearer"></div>
+    </div>
+    <div class="footer">
+      &copy;2023, Anonymous.
+      
+      |
+      Powered by <a href="http://sphinx-doc.org/">Sphinx 6.1.3</a>
+      &amp; <a href="https://github.com/bitprophet/alabaster">Alabaster 0.7.13</a>
+      
+      |
+      <a href="_sources/ethmac.rst.txt"
+          rel="nofollow">Page source</a>
+    </div>
+
+    
+
+    
+  </body>
+</html>

gateware/liteeth/doc/_build/html/ethphy.html

@@ -0,0 +1,320 @@
+
+<!DOCTYPE html>
+
+<html lang="en">
+  <head>
+    <meta charset="utf-8" />
+    <meta name="viewport" content="width=device-width, initial-scale=1.0" /><meta name="generator" content="Docutils 0.19: https://docutils.sourceforge.io/" />
+
+    <title>ETHPHY &#8212; LiteX SoC Project  documentation</title>
+    <link rel="stylesheet" type="text/css" href="_static/pygments.css" />
+    <link rel="stylesheet" type="text/css" href="_static/alabaster.css" />
+    <script data-url_root="./" id="documentation_options" src="_static/documentation_options.js"></script>
+    <script src="_static/doctools.js"></script>
+    <script src="_static/sphinx_highlight.js"></script>
+    <script src="_static/default.js"></script>
+    <script src="_static/WaveDrom.js"></script>
+    <link rel="index" title="Index" href="genindex.html" />
+    <link rel="search" title="Search" href="search.html" />
+    <link rel="prev" title="ETHMAC" href="ethmac.html" />
+   
+  <link rel="stylesheet" href="_static/custom.css" type="text/css" />
+  
+  
+  <meta name="viewport" content="width=device-width, initial-scale=0.9, maximum-scale=0.9" />
+
+  </head><body>
+  
+
+    <div class="document">
+      <div class="documentwrapper">
+        <div class="bodywrapper">
+          
+
+          <div class="body" role="main">
+            
+  <section id="ethphy">
+<h1>ETHPHY<a class="headerlink" href="#ethphy" title="Permalink to this heading">¶</a></h1>
+<section id="register-listing-for-ethphy">
+<h2>Register Listing for ETHPHY<a class="headerlink" href="#register-listing-for-ethphy" title="Permalink to this heading">¶</a></h2>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Register</p></th>
+<th class="head"><p>Address</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p><a class="reference internal" href="#ethphy-crg-reset"><span class="std std-ref">ETHPHY_CRG_RESET</span></a></p></td>
+<td><p><a class="reference internal" href="#ethphy-crg-reset"><span class="std std-ref">0x00001000</span></a></p></td>
+</tr>
+<tr class="row-odd"><td><p><a class="reference internal" href="#ethphy-rx-inband-status"><span class="std std-ref">ETHPHY_RX_INBAND_STATUS</span></a></p></td>
+<td><p><a class="reference internal" href="#ethphy-rx-inband-status"><span class="std std-ref">0x00001004</span></a></p></td>
+</tr>
+<tr class="row-even"><td><p><a class="reference internal" href="#ethphy-mdio-w"><span class="std std-ref">ETHPHY_MDIO_W</span></a></p></td>
+<td><p><a class="reference internal" href="#ethphy-mdio-w"><span class="std std-ref">0x00001008</span></a></p></td>
+</tr>
+<tr class="row-odd"><td><p><a class="reference internal" href="#ethphy-mdio-r"><span class="std std-ref">ETHPHY_MDIO_R</span></a></p></td>
+<td><p><a class="reference internal" href="#ethphy-mdio-r"><span class="std std-ref">0x0000100c</span></a></p></td>
+</tr>
+</tbody>
+</table>
+<section id="ethphy-crg-reset">
+<h3>ETHPHY_CRG_RESET<a class="headerlink" href="#ethphy-crg-reset" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00001000 + 0x0 = 0x00001000</cite></p>
+<blockquote>
+<div>
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "crg_reset", "bits": 1},
+        {"bits": 31},
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+}
+</script>
+</div>
+</div></blockquote>
+</section>
+<section id="ethphy-rx-inband-status">
+<h3>ETHPHY_RX_INBAND_STATUS<a class="headerlink" href="#ethphy-rx-inband-status" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00001000 + 0x4 = 0x00001004</cite></p>
+<blockquote>
+<div>
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "link_status",  "bits": 1},
+        {"name": "clock_speed",  "bits": 1},
+        {"name": "duplex_status",  "bits": 1},
+        {"bits": 29}
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+}
+</script>
+</div>
+</div></blockquote>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Field</p></th>
+<th class="head"><p>Name</p></th>
+<th class="head"><p>Description</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p>[0]</p></td>
+<td><p>LINK_STATUS</p></td>
+<td><table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Value</p></th>
+<th class="head"><p>Description</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0b0</span></code></p></td>
+<td><p>Link down.</p></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0b1</span></code></p></td>
+<td><p>Link up.</p></td>
+</tr>
+</tbody>
+</table>
+</td>
+</tr>
+<tr class="row-odd"><td><p>[1]</p></td>
+<td><p>CLOCK_SPEED</p></td>
+<td><table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Value</p></th>
+<th class="head"><p>Description</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0b00</span></code></p></td>
+<td><p>2.5MHz   (10Mbps).</p></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0b01</span></code></p></td>
+<td><p>25MHz   (100MBps).</p></td>
+</tr>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0b10</span></code></p></td>
+<td><p>125MHz (1000MBps).</p></td>
+</tr>
+</tbody>
+</table>
+</td>
+</tr>
+<tr class="row-even"><td><p>[2]</p></td>
+<td><p>DUPLEX_STATUS</p></td>
+<td><table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Value</p></th>
+<th class="head"><p>Description</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td><p><code class="docutils literal notranslate"><span class="pre">0b0</span></code></p></td>
+<td><p>Half-duplex.</p></td>
+</tr>
+<tr class="row-odd"><td><p><code class="docutils literal notranslate"><span class="pre">0b1</span></code></p></td>
+<td><p>Full-duplex.</p></td>
+</tr>
+</tbody>
+</table>
+</td>
+</tr>
+</tbody>
+</table>
+</section>
+<section id="ethphy-mdio-w">
+<h3>ETHPHY_MDIO_W<a class="headerlink" href="#ethphy-mdio-w" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00001000 + 0x8 = 0x00001008</cite></p>
+<blockquote>
+<div>
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "mdc",  "bits": 1},
+        {"name": "oe",  "bits": 1},
+        {"name": "w",  "bits": 1},
+        {"bits": 29}
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+}
+</script>
+</div>
+</div></blockquote>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Field</p></th>
+<th class="head"><p>Name</p></th>
+<th class="head"><p>Description</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td></td>
+<td></td>
+<td></td>
+</tr>
+<tr class="row-odd"><td></td>
+<td></td>
+<td></td>
+</tr>
+<tr class="row-even"><td></td>
+<td></td>
+<td></td>
+</tr>
+</tbody>
+</table>
+</section>
+<section id="ethphy-mdio-r">
+<h3>ETHPHY_MDIO_R<a class="headerlink" href="#ethphy-mdio-r" title="Permalink to this heading">¶</a></h3>
+<p><cite>Address: 0x00001000 + 0xc = 0x0000100c</cite></p>
+<blockquote>
+<div>
+<div style="overflow-x:auto">
+<script type="WaveDrom">
+{
+    "reg": [
+        {"name": "r",  "bits": 1},
+        {"bits": 31}
+    ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+}
+</script>
+</div>
+</div></blockquote>
+<table class="docutils align-default">
+<thead>
+<tr class="row-odd"><th class="head"><p>Field</p></th>
+<th class="head"><p>Name</p></th>
+<th class="head"><p>Description</p></th>
+</tr>
+</thead>
+<tbody>
+<tr class="row-even"><td></td>
+<td></td>
+<td></td>
+</tr>
+</tbody>
+</table>
+</section>
+</section>
+</section>
+
+    <script type="text/javascript">
+        function init() {
+            WaveDrom.ProcessAll();
+        }
+        window.onload = init;
+    </script>
+
+          </div>
+          
+        </div>
+      </div>
+      <div class="sphinxsidebar" role="navigation" aria-label="main navigation">
+        <div class="sphinxsidebarwrapper">
+<h1 class="logo"><a href="index.html">LiteX SoC Project</a></h1>
+
+
+
+
+
+
+
+
+<h3>Navigation</h3>
+<ul>
+<li class="toctree-l1"><a class="reference internal" href="interrupts.html">Interrupt Controller</a></li>
+</ul>
+<ul class="current">
+<li class="toctree-l1"><a class="reference internal" href="ctrl.html">CTRL</a></li>
+<li class="toctree-l1"><a class="reference internal" href="ethmac.html">ETHMAC</a></li>
+<li class="toctree-l1 current"><a class="current reference internal" href="#">ETHPHY</a></li>
+</ul>
+
+<div class="relations">
+<h3>Related Topics</h3>
+<ul>
+  <li><a href="index.html">Documentation overview</a><ul>
+      <li>Previous: <a href="ethmac.html" title="previous chapter">ETHMAC</a></li>
+  </ul></li>
+</ul>
+</div>
+<div id="searchbox" style="display: none" role="search">
+  <h3 id="searchlabel">Quick search</h3>
+    <div class="searchformwrapper">
+    <form class="search" action="search.html" method="get">
+      <input type="text" name="q" aria-labelledby="searchlabel" autocomplete="off" autocorrect="off" autocapitalize="off" spellcheck="false"/>
+      <input type="submit" value="Go" />
+    </form>
+    </div>
+</div>
+<script>document.getElementById('searchbox').style.display = "block"</script>
+
+
+
+
+
+
+
+
+        </div>
+      </div>
+      <div class="clearer"></div>
+    </div>
+    <div class="footer">
+      &copy;2023, Anonymous.
+      
+      |
+      Powered by <a href="http://sphinx-doc.org/">Sphinx 6.1.3</a>
+      &amp; <a href="https://github.com/bitprophet/alabaster">Alabaster 0.7.13</a>
+      
+      |
+      <a href="_sources/ethphy.rst.txt"
+          rel="nofollow">Page source</a>
+    </div>
+
+    
+
+    
+  </body>
+</html>

gateware/liteeth/doc/_build/html/genindex.html

@@ -0,0 +1,109 @@
+
+<!DOCTYPE html>
+
+<html lang="en">
+  <head>
+    <meta charset="utf-8" />
+    <meta name="viewport" content="width=device-width, initial-scale=1.0" />
+    <title>Index &#8212; LiteX SoC Project  documentation</title>
+    <link rel="stylesheet" type="text/css" href="_static/pygments.css" />
+    <link rel="stylesheet" type="text/css" href="_static/alabaster.css" />
+    <script data-url_root="./" id="documentation_options" src="_static/documentation_options.js"></script>
+    <script src="_static/doctools.js"></script>
+    <script src="_static/sphinx_highlight.js"></script>
+    <script src="_static/default.js"></script>
+    <script src="_static/WaveDrom.js"></script>
+    <link rel="index" title="Index" href="#" />
+    <link rel="search" title="Search" href="search.html" />
+   
+  <link rel="stylesheet" href="_static/custom.css" type="text/css" />
+  
+  
+  <meta name="viewport" content="width=device-width, initial-scale=0.9, maximum-scale=0.9" />
+
+  </head><body>
+  
+
+    <div class="document">
+      <div class="documentwrapper">
+        <div class="bodywrapper">
+          
+
+          <div class="body" role="main">
+            
+
+<h1 id="index">Index</h1>
+
+<div class="genindex-jumpbox">
+ 
+</div>
+
+
+          </div>
+          
+        </div>
+      </div>
+      <div class="sphinxsidebar" role="navigation" aria-label="main navigation">
+        <div class="sphinxsidebarwrapper">
+<h1 class="logo"><a href="index.html">LiteX SoC Project</a></h1>
+
+
+
+
+
+
+
+
+<h3>Navigation</h3>
+<ul>
+<li class="toctree-l1"><a class="reference internal" href="interrupts.html">Interrupt Controller</a></li>
+</ul>
+<ul>
+<li class="toctree-l1"><a class="reference internal" href="ctrl.html">CTRL</a></li>
+<li class="toctree-l1"><a class="reference internal" href="ethmac.html">ETHMAC</a></li>
+<li class="toctree-l1"><a class="reference internal" href="ethphy.html">ETHPHY</a></li>
+</ul>
+
+<div class="relations">
+<h3>Related Topics</h3>
+<ul>
+  <li><a href="index.html">Documentation overview</a><ul>
+  </ul></li>
+</ul>
+</div>
+<div id="searchbox" style="display: none" role="search">
+  <h3 id="searchlabel">Quick search</h3>
+    <div class="searchformwrapper">
+    <form class="search" action="search.html" method="get">
+      <input type="text" name="q" aria-labelledby="searchlabel" autocomplete="off" autocorrect="off" autocapitalize="off" spellcheck="false"/>
+      <input type="submit" value="Go" />
+    </form>
+    </div>
+</div>
+<script>document.getElementById('searchbox').style.display = "block"</script>
+
+
+
+
+
+
+
+
+        </div>
+      </div>
+      <div class="clearer"></div>
+    </div>
+    <div class="footer">
+      &copy;2023, Anonymous.
+      
+      |
+      Powered by <a href="http://sphinx-doc.org/">Sphinx 6.1.3</a>
+      &amp; <a href="https://github.com/bitprophet/alabaster">Alabaster 0.7.13</a>
+      
+    </div>
+
+    
+
+    
+  </body>
+</html>

gateware/liteeth/doc/_build/html/index.html

@@ -0,0 +1,144 @@
+
+<!DOCTYPE html>
+
+<html lang="en">
+  <head>
+    <meta charset="utf-8" />
+    <meta name="viewport" content="width=device-width, initial-scale=1.0" /><meta name="generator" content="Docutils 0.19: https://docutils.sourceforge.io/" />
+
+    <title>Documentation for LiteX SoC Project &#8212; LiteX SoC Project  documentation</title>
+    <link rel="stylesheet" type="text/css" href="_static/pygments.css" />
+    <link rel="stylesheet" type="text/css" href="_static/alabaster.css" />
+    <script data-url_root="./" id="documentation_options" src="_static/documentation_options.js"></script>
+    <script src="_static/doctools.js"></script>
+    <script src="_static/sphinx_highlight.js"></script>
+    <script src="_static/default.js"></script>
+    <script src="_static/WaveDrom.js"></script>
+    <link rel="index" title="Index" href="genindex.html" />
+    <link rel="search" title="Search" href="search.html" />
+    <link rel="next" title="Interrupt Controller" href="interrupts.html" />
+   
+  <link rel="stylesheet" href="_static/custom.css" type="text/css" />
+  
+  
+  <meta name="viewport" content="width=device-width, initial-scale=0.9, maximum-scale=0.9" />
+
+  </head><body>
+  
+
+    <div class="document">
+      <div class="documentwrapper">
+        <div class="bodywrapper">
+          
+
+          <div class="body" role="main">
+            
+  <section id="documentation-for-litex-soc-project">
+<h1>Documentation for LiteX SoC Project<a class="headerlink" href="#documentation-for-litex-soc-project" title="Permalink to this heading">¶</a></h1>
+</section>
+<section id="modules">
+<h1>Modules<a class="headerlink" href="#modules" title="Permalink to this heading">¶</a></h1>
+<div class="toctree-wrapper compound">
+<ul>
+<li class="toctree-l1"><a class="reference internal" href="interrupts.html">Interrupt Controller</a></li>
+</ul>
+</div>
+</section>
+<section id="register-groups">
+<h1>Register Groups<a class="headerlink" href="#register-groups" title="Permalink to this heading">¶</a></h1>
+<div class="toctree-wrapper compound">
+<ul>
+<li class="toctree-l1"><a class="reference internal" href="ctrl.html">CTRL</a></li>
+<li class="toctree-l1"><a class="reference internal" href="ethmac.html">ETHMAC</a></li>
+<li class="toctree-l1"><a class="reference internal" href="ethphy.html">ETHPHY</a></li>
+</ul>
+</div>
+</section>
+<section id="indices-and-tables">
+<h1>Indices and tables<a class="headerlink" href="#indices-and-tables" title="Permalink to this heading">¶</a></h1>
+<ul class="simple">
+<li><p><a class="reference internal" href="genindex.html"><span class="std std-ref">Index</span></a></p></li>
+<li><p><a class="reference internal" href="py-modindex.html"><span class="std std-ref">Module Index</span></a></p></li>
+<li><p><a class="reference internal" href="search.html"><span class="std std-ref">Search Page</span></a></p></li>
+</ul>
+</section>
+
+    <script type="text/javascript">
+        function init() {
+            WaveDrom.ProcessAll();
+        }
+        window.onload = init;
+    </script>
+
+          </div>
+          
+        </div>
+      </div>
+      <div class="sphinxsidebar" role="navigation" aria-label="main navigation">
+        <div class="sphinxsidebarwrapper">
+<h1 class="logo"><a href="#">LiteX SoC Project</a></h1>
+
+
+
+
+
+
+
+
+<h3>Navigation</h3>
+<ul>
+<li class="toctree-l1"><a class="reference internal" href="interrupts.html">Interrupt Controller</a></li>
+</ul>
+<ul>
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gateware/liteeth/doc/_build/html/interrupts.html

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+            
+  <section id="interrupt-controller">
+<h1>Interrupt Controller<a class="headerlink" href="#interrupt-controller" title="Permalink to this heading">¶</a></h1>
+<p>This device has an <code class="docutils literal notranslate"><span class="pre">EventManager</span></code>-based interrupt system.  Individual modules
+generate <cite>events</cite> which are wired into a central interrupt controller.</p>
+<p>When an interrupt occurs, you should look the interrupt number up in the CPU-
+specific interrupt table and then call the relevant module.</p>
+<section id="assigned-interrupts">
+<h2>Assigned Interrupts<a class="headerlink" href="#assigned-interrupts" title="Permalink to this heading">¶</a></h2>
+<p>The following interrupts are assigned on this system:</p>
+</section>
+</section>
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gateware/liteeth/doc/conf.py

@@ -0,0 +1,17 @@
+
+project = 'LiteX SoC Project'
+copyright = '2023, Anonymous'
+author = 'Anonymous'
+extensions = [
+    'sphinx.ext.autosectionlabel',
+    'sphinxcontrib.wavedrom',
+]
+templates_path = ['_templates']
+exclude_patterns = []
+offline_skin_js_path = "https://wavedrom.com/skins/default.js"
+offline_wavedrom_js_path = "https://wavedrom.com/WaveDrom.js"
+html_theme = 'alabaster'
+html_static_path = ['_static']
+master_doc = 'index'
+
+

gateware/liteeth/doc/ctrl.rst

@@ -0,0 +1,78 @@
+CTRL
+====
+
+Register Listing for CTRL
+-------------------------
+
++------------------------------------------+-------------------------------------+
+| Register                                 | Address                             |
++==========================================+=====================================+
+| :ref:`CTRL_RESET <CTRL_RESET>`           | :ref:`0x00000000 <CTRL_RESET>`      |
++------------------------------------------+-------------------------------------+
+| :ref:`CTRL_SCRATCH <CTRL_SCRATCH>`       | :ref:`0x00000004 <CTRL_SCRATCH>`    |
++------------------------------------------+-------------------------------------+
+| :ref:`CTRL_BUS_ERRORS <CTRL_BUS_ERRORS>` | :ref:`0x00000008 <CTRL_BUS_ERRORS>` |
++------------------------------------------+-------------------------------------+
+
+CTRL_RESET
+^^^^^^^^^^
+
+`Address: 0x00000000 + 0x0 = 0x00000000`
+
+
+    .. wavedrom::
+        :caption: CTRL_RESET
+
+        {
+            "reg": [
+                {"name": "soc_rst",  "type": 4, "bits": 1},
+                {"name": "cpu_rst",  "bits": 1},
+                {"bits": 30}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+---------+------------------------------------------------------------------------+
+| Field | Name    | Description                                                            |
++=======+=========+========================================================================+
+| [0]   | SOC_RST | Write `1` to this register to reset the full SoC (Pulse Reset)         |
++-------+---------+------------------------------------------------------------------------+
+| [1]   | CPU_RST | Write `1` to this register to reset the CPU(s) of the SoC (Hold Reset) |
++-------+---------+------------------------------------------------------------------------+
+
+CTRL_SCRATCH
+^^^^^^^^^^^^
+
+`Address: 0x00000000 + 0x4 = 0x00000004`
+
+    Use this register as a scratch space to verify that software read/write accesses
+    to the Wishbone/CSR bus are working correctly. The initial reset value of
+    0x1234578 can be used to verify endianness.
+
+    .. wavedrom::
+        :caption: CTRL_SCRATCH
+
+        {
+            "reg": [
+                {"name": "scratch[31:0]", "attr": 'reset: 305419896', "bits": 32}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+        }
+
+
+CTRL_BUS_ERRORS
+^^^^^^^^^^^^^^^
+
+`Address: 0x00000000 + 0x8 = 0x00000008`
+
+    Total number of Wishbone bus errors (timeouts) since start.
+
+    .. wavedrom::
+        :caption: CTRL_BUS_ERRORS
+
+        {
+            "reg": [
+                {"name": "bus_errors[31:0]", "bits": 32}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+        }
+
+

gateware/liteeth/doc/ethmac.rst

@@ -0,0 +1,380 @@
+ETHMAC
+======
+
+Register Listing for ETHMAC
+---------------------------
+
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| Register                                                                       | Address                                                |
++================================================================================+========================================================+
+| :ref:`ETHMAC_SRAM_WRITER_SLOT <ETHMAC_SRAM_WRITER_SLOT>`                       | :ref:`0x00000800 <ETHMAC_SRAM_WRITER_SLOT>`            |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_WRITER_LENGTH <ETHMAC_SRAM_WRITER_LENGTH>`                   | :ref:`0x00000804 <ETHMAC_SRAM_WRITER_LENGTH>`          |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_WRITER_ERRORS <ETHMAC_SRAM_WRITER_ERRORS>`                   | :ref:`0x00000808 <ETHMAC_SRAM_WRITER_ERRORS>`          |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_WRITER_EV_STATUS <ETHMAC_SRAM_WRITER_EV_STATUS>`             | :ref:`0x0000080c <ETHMAC_SRAM_WRITER_EV_STATUS>`       |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_WRITER_EV_PENDING <ETHMAC_SRAM_WRITER_EV_PENDING>`           | :ref:`0x00000810 <ETHMAC_SRAM_WRITER_EV_PENDING>`      |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_WRITER_EV_ENABLE <ETHMAC_SRAM_WRITER_EV_ENABLE>`             | :ref:`0x00000814 <ETHMAC_SRAM_WRITER_EV_ENABLE>`       |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_READER_START <ETHMAC_SRAM_READER_START>`                     | :ref:`0x00000818 <ETHMAC_SRAM_READER_START>`           |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_READER_READY <ETHMAC_SRAM_READER_READY>`                     | :ref:`0x0000081c <ETHMAC_SRAM_READER_READY>`           |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_READER_LEVEL <ETHMAC_SRAM_READER_LEVEL>`                     | :ref:`0x00000820 <ETHMAC_SRAM_READER_LEVEL>`           |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_READER_SLOT <ETHMAC_SRAM_READER_SLOT>`                       | :ref:`0x00000824 <ETHMAC_SRAM_READER_SLOT>`            |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_READER_LENGTH <ETHMAC_SRAM_READER_LENGTH>`                   | :ref:`0x00000828 <ETHMAC_SRAM_READER_LENGTH>`          |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_READER_EV_STATUS <ETHMAC_SRAM_READER_EV_STATUS>`             | :ref:`0x0000082c <ETHMAC_SRAM_READER_EV_STATUS>`       |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_READER_EV_PENDING <ETHMAC_SRAM_READER_EV_PENDING>`           | :ref:`0x00000830 <ETHMAC_SRAM_READER_EV_PENDING>`      |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_SRAM_READER_EV_ENABLE <ETHMAC_SRAM_READER_EV_ENABLE>`             | :ref:`0x00000834 <ETHMAC_SRAM_READER_EV_ENABLE>`       |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_PREAMBLE_CRC <ETHMAC_PREAMBLE_CRC>`                               | :ref:`0x00000838 <ETHMAC_PREAMBLE_CRC>`                |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS <ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS>` | :ref:`0x0000083c <ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS>` |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+| :ref:`ETHMAC_RX_DATAPATH_CRC_ERRORS <ETHMAC_RX_DATAPATH_CRC_ERRORS>`           | :ref:`0x00000840 <ETHMAC_RX_DATAPATH_CRC_ERRORS>`      |
++--------------------------------------------------------------------------------+--------------------------------------------------------+
+
+ETHMAC_SRAM_WRITER_SLOT
+^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x0 = 0x00000800`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_WRITER_SLOT
+
+        {
+            "reg": [
+                {"name": "sram_writer_slot", "bits": 1},
+                {"bits": 31},
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
+ETHMAC_SRAM_WRITER_LENGTH
+^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x4 = 0x00000804`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_WRITER_LENGTH
+
+        {
+            "reg": [
+                {"name": "sram_writer_length[10:0]", "bits": 11},
+                {"bits": 21},
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+        }
+
+
+ETHMAC_SRAM_WRITER_ERRORS
+^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x8 = 0x00000808`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_WRITER_ERRORS
+
+        {
+            "reg": [
+                {"name": "sram_writer_errors[31:0]", "bits": 32}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+        }
+
+
+ETHMAC_SRAM_WRITER_EV_STATUS
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0xc = 0x0000080c`
+
+    This register contains the current raw level of the available event trigger.
+    Writes to this register have no effect.
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_WRITER_EV_STATUS
+
+        {
+            "reg": [
+                {"name": "available",  "bits": 1},
+                {"bits": 31}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+-----------+----------------------------------+
+| Field | Name      | Description                      |
++=======+===========+==================================+
+| [0]   | AVAILABLE | Level of the ``available`` event |
++-------+-----------+----------------------------------+
+
+ETHMAC_SRAM_WRITER_EV_PENDING
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x10 = 0x00000810`
+
+    When a  available event occurs, the corresponding bit will be set in this
+    register.  To clear the Event, set the corresponding bit in this register.
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_WRITER_EV_PENDING
+
+        {
+            "reg": [
+                {"name": "available",  "bits": 1},
+                {"bits": 31}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+-----------+---------------------------------------------------------------------------------+
+| Field | Name      | Description                                                                     |
++=======+===========+=================================================================================+
+| [0]   | AVAILABLE | `1` if a `available` event occurred. This Event is **level triggered** when the |
+|       |           | signal is **high**.                                                             |
++-------+-----------+---------------------------------------------------------------------------------+
+
+ETHMAC_SRAM_WRITER_EV_ENABLE
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x14 = 0x00000814`
+
+    This register enables the corresponding available events.  Write a ``0`` to this
+    register to disable individual events.
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_WRITER_EV_ENABLE
+
+        {
+            "reg": [
+                {"name": "available",  "bits": 1},
+                {"bits": 31}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+-----------+-------------------------------------------------+
+| Field | Name      | Description                                     |
++=======+===========+=================================================+
+| [0]   | AVAILABLE | Write a ``1`` to enable the ``available`` Event |
++-------+-----------+-------------------------------------------------+
+
+ETHMAC_SRAM_READER_START
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x18 = 0x00000818`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_READER_START
+
+        {
+            "reg": [
+                {"name": "sram_reader_start", "bits": 1},
+                {"bits": 31},
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
+ETHMAC_SRAM_READER_READY
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x1c = 0x0000081c`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_READER_READY
+
+        {
+            "reg": [
+                {"name": "sram_reader_ready", "bits": 1},
+                {"bits": 31},
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
+ETHMAC_SRAM_READER_LEVEL
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x20 = 0x00000820`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_READER_LEVEL
+
+        {
+            "reg": [
+                {"name": "sram_reader_level[1:0]", "bits": 2},
+                {"bits": 30},
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
+ETHMAC_SRAM_READER_SLOT
+^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x24 = 0x00000824`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_READER_SLOT
+
+        {
+            "reg": [
+                {"name": "sram_reader_slot", "bits": 1},
+                {"bits": 31},
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
+ETHMAC_SRAM_READER_LENGTH
+^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x28 = 0x00000828`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_READER_LENGTH
+
+        {
+            "reg": [
+                {"name": "sram_reader_length[10:0]", "bits": 11},
+                {"bits": 21},
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+        }
+
+
+ETHMAC_SRAM_READER_EV_STATUS
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x2c = 0x0000082c`
+
+    This register contains the current raw level of the event0 event trigger.
+    Writes to this register have no effect.
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_READER_EV_STATUS
+
+        {
+            "reg": [
+                {"name": "event0",  "bits": 1},
+                {"bits": 31}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+--------+-------------------------------+
+| Field | Name   | Description                   |
++=======+========+===============================+
+| [0]   | EVENT0 | Level of the ``event0`` event |
++-------+--------+-------------------------------+
+
+ETHMAC_SRAM_READER_EV_PENDING
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x30 = 0x00000830`
+
+    When a  event0 event occurs, the corresponding bit will be set in this register.
+    To clear the Event, set the corresponding bit in this register.
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_READER_EV_PENDING
+
+        {
+            "reg": [
+                {"name": "event0",  "bits": 1},
+                {"bits": 31}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+--------+----------------------------------------------------------------------------------+
+| Field | Name   | Description                                                                      |
++=======+========+==================================================================================+
+| [0]   | EVENT0 | `1` if a this particular event occurred. This Event is triggered on a **rising** |
+|       |        | edge.                                                                            |
++-------+--------+----------------------------------------------------------------------------------+
+
+ETHMAC_SRAM_READER_EV_ENABLE
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x34 = 0x00000834`
+
+    This register enables the corresponding event0 events.  Write a ``0`` to this
+    register to disable individual events.
+
+    .. wavedrom::
+        :caption: ETHMAC_SRAM_READER_EV_ENABLE
+
+        {
+            "reg": [
+                {"name": "event0",  "bits": 1},
+                {"bits": 31}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+--------+----------------------------------------------+
+| Field | Name   | Description                                  |
++=======+========+==============================================+
+| [0]   | EVENT0 | Write a ``1`` to enable the ``event0`` Event |
++-------+--------+----------------------------------------------+
+
+ETHMAC_PREAMBLE_CRC
+^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x38 = 0x00000838`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_PREAMBLE_CRC
+
+        {
+            "reg": [
+                {"name": "preamble_crc", "attr": 'reset: 1', "bits": 1},
+                {"bits": 31},
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
+ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x3c = 0x0000083c`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS
+
+        {
+            "reg": [
+                {"name": "rx_datapath_preamble_errors[31:0]", "bits": 32}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+        }
+
+
+ETHMAC_RX_DATAPATH_CRC_ERRORS
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00000800 + 0x40 = 0x00000840`
+
+
+    .. wavedrom::
+        :caption: ETHMAC_RX_DATAPATH_CRC_ERRORS
+
+        {
+            "reg": [
+                {"name": "rx_datapath_crc_errors[31:0]", "bits": 32}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 1 }, "options": {"hspace": 400, "bits": 32, "lanes": 1}
+        }
+
+

gateware/liteeth/doc/ethphy.rst

@@ -0,0 +1,138 @@
+ETHPHY
+======
+
+Register Listing for ETHPHY
+---------------------------
+
++----------------------------------------------------------+---------------------------------------------+
+| Register                                                 | Address                                     |
++==========================================================+=============================================+
+| :ref:`ETHPHY_CRG_RESET <ETHPHY_CRG_RESET>`               | :ref:`0x00001000 <ETHPHY_CRG_RESET>`        |
++----------------------------------------------------------+---------------------------------------------+
+| :ref:`ETHPHY_RX_INBAND_STATUS <ETHPHY_RX_INBAND_STATUS>` | :ref:`0x00001004 <ETHPHY_RX_INBAND_STATUS>` |
++----------------------------------------------------------+---------------------------------------------+
+| :ref:`ETHPHY_MDIO_W <ETHPHY_MDIO_W>`                     | :ref:`0x00001008 <ETHPHY_MDIO_W>`           |
++----------------------------------------------------------+---------------------------------------------+
+| :ref:`ETHPHY_MDIO_R <ETHPHY_MDIO_R>`                     | :ref:`0x0000100c <ETHPHY_MDIO_R>`           |
++----------------------------------------------------------+---------------------------------------------+
+
+ETHPHY_CRG_RESET
+^^^^^^^^^^^^^^^^
+
+`Address: 0x00001000 + 0x0 = 0x00001000`
+
+
+    .. wavedrom::
+        :caption: ETHPHY_CRG_RESET
+
+        {
+            "reg": [
+                {"name": "crg_reset", "bits": 1},
+                {"bits": 31},
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
+ETHPHY_RX_INBAND_STATUS
+^^^^^^^^^^^^^^^^^^^^^^^
+
+`Address: 0x00001000 + 0x4 = 0x00001004`
+
+
+    .. wavedrom::
+        :caption: ETHPHY_RX_INBAND_STATUS
+
+        {
+            "reg": [
+                {"name": "link_status",  "bits": 1},
+                {"name": "clock_speed",  "bits": 1},
+                {"name": "duplex_status",  "bits": 1},
+                {"bits": 29}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+---------------+-----------------------------------+
+| Field | Name          | Description                       |
++=======+===============+===================================+
+| [0]   | LINK_STATUS   |                                   |
+|       |               |                                   |
+|       |               | +---------+-------------+         |
+|       |               | | Value   | Description |         |
+|       |               | +=========+=============+         |
+|       |               | | ``0b0`` | Link down.  |         |
+|       |               | +---------+-------------+         |
+|       |               | | ``0b1`` | Link up.    |         |
+|       |               | +---------+-------------+         |
++-------+---------------+-----------------------------------+
+| [1]   | CLOCK_SPEED   |                                   |
+|       |               |                                   |
+|       |               | +----------+--------------------+ |
+|       |               | | Value    | Description        | |
+|       |               | +==========+====================+ |
+|       |               | | ``0b00`` | 2.5MHz   (10Mbps). | |
+|       |               | +----------+--------------------+ |
+|       |               | | ``0b01`` | 25MHz   (100MBps). | |
+|       |               | +----------+--------------------+ |
+|       |               | | ``0b10`` | 125MHz (1000MBps). | |
+|       |               | +----------+--------------------+ |
++-------+---------------+-----------------------------------+
+| [2]   | DUPLEX_STATUS |                                   |
+|       |               |                                   |
+|       |               | +---------+--------------+        |
+|       |               | | Value   | Description  |        |
+|       |               | +=========+==============+        |
+|       |               | | ``0b0`` | Half-duplex. |        |
+|       |               | +---------+--------------+        |
+|       |               | | ``0b1`` | Full-duplex. |        |
+|       |               | +---------+--------------+        |
++-------+---------------+-----------------------------------+
+
+ETHPHY_MDIO_W
+^^^^^^^^^^^^^
+
+`Address: 0x00001000 + 0x8 = 0x00001008`
+
+
+    .. wavedrom::
+        :caption: ETHPHY_MDIO_W
+
+        {
+            "reg": [
+                {"name": "mdc",  "bits": 1},
+                {"name": "oe",  "bits": 1},
+                {"name": "w",  "bits": 1},
+                {"bits": 29}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+------+-------------+
+| Field | Name | Description |
++=======+======+=============+
++-------+------+-------------+
++-------+------+-------------+
++-------+------+-------------+
+
+ETHPHY_MDIO_R
+^^^^^^^^^^^^^
+
+`Address: 0x00001000 + 0xc = 0x0000100c`
+
+
+    .. wavedrom::
+        :caption: ETHPHY_MDIO_R
+
+        {
+            "reg": [
+                {"name": "r",  "bits": 1},
+                {"bits": 31}
+            ], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
+        }
+
+
++-------+------+-------------+
+| Field | Name | Description |
++=======+======+=============+
++-------+------+-------------+
+

gateware/liteeth/doc/index.rst

@@ -0,0 +1,31 @@
+
+Documentation for LiteX SoC Project
+===================================
+
+
+
+Modules
+=======
+
+.. toctree::
+    :maxdepth: 1
+
+    interrupts
+
+Register Groups
+===============
+
+.. toctree::
+    :maxdepth: 1
+
+    ctrl
+    ethmac
+    ethphy
+
+Indices and tables
+==================
+
+* :ref:`genindex`
+* :ref:`modindex`
+* :ref:`search`
+

gateware/liteeth/doc/interrupts.rst

@@ -0,0 +1,18 @@
+Interrupt Controller
+====================
+
+This device has an ``EventManager``-based interrupt system.  Individual modules
+generate `events` which are wired into a central interrupt controller.
+
+When an interrupt occurs, you should look the interrupt number up in the CPU-
+specific interrupt table and then call the relevant module.
+
+Assigned Interrupts
+-------------------
+
+The following interrupts are assigned on this system:
+
++-----------+--------+
+| Interrupt | Module |
++===========+========+
+

gateware/liteeth/gateware/build_liteeth_core.sh

@@ -0,0 +1,5 @@
+# Autogenerated by LiteX / git: 8159b5ca
+set -e
+yosys -l liteeth_core.rpt liteeth_core.ys
+nextpnr-ecp5 --json liteeth_core.json --lpf liteeth_core.lpf --textcfg liteeth_core.config  --45k --package CABGA381 --speed 6 --timing-allow-fail --seed 1 
+ecppack  --bootaddr 0   --compress  liteeth_core.config --svf liteeth_core.svf --bit liteeth_core.bit 

gateware/liteeth/gateware/liteeth_core.lpf

@@ -0,0 +1,132 @@
+BLOCK RESETPATHS;
+BLOCK ASYNCPATHS;
+LOCATE COMP "sys_clock" SITE "X";
+LOCATE COMP "sys_reset" SITE "X";
+LOCATE COMP "rgmii_eth_clocks_tx" SITE "X";
+LOCATE COMP "rgmii_eth_clocks_rx" SITE "X";
+LOCATE COMP "rgmii_eth_rst_n" SITE "X";
+LOCATE COMP "rgmii_eth_int_n" SITE "X";
+LOCATE COMP "rgmii_eth_mdio" SITE "X";
+LOCATE COMP "rgmii_eth_mdc" SITE "X";
+LOCATE COMP "rgmii_eth_rx_ctl" SITE "X";
+LOCATE COMP "rgmii_eth_rx_data[0]" SITE "X";
+LOCATE COMP "rgmii_eth_rx_data[1]" SITE "X";
+LOCATE COMP "rgmii_eth_rx_data[2]" SITE "X";
+LOCATE COMP "rgmii_eth_rx_data[3]" SITE "X";
+LOCATE COMP "rgmii_eth_tx_ctl" SITE "X";
+LOCATE COMP "rgmii_eth_tx_data[0]" SITE "X";
+LOCATE COMP "rgmii_eth_tx_data[1]" SITE "X";
+LOCATE COMP "rgmii_eth_tx_data[2]" SITE "X";
+LOCATE COMP "rgmii_eth_tx_data[3]" SITE "X";
+LOCATE COMP "wishbone_adr[0]" SITE "X";
+LOCATE COMP "wishbone_adr[1]" SITE "X";
+LOCATE COMP "wishbone_adr[2]" SITE "X";
+LOCATE COMP "wishbone_adr[3]" SITE "X";
+LOCATE COMP "wishbone_adr[4]" SITE "X";
+LOCATE COMP "wishbone_adr[5]" SITE "X";
+LOCATE COMP "wishbone_adr[6]" SITE "X";
+LOCATE COMP "wishbone_adr[7]" SITE "X";
+LOCATE COMP "wishbone_adr[8]" SITE "X";
+LOCATE COMP "wishbone_adr[9]" SITE "X";
+LOCATE COMP "wishbone_adr[10]" SITE "X";
+LOCATE COMP "wishbone_adr[11]" SITE "X";
+LOCATE COMP "wishbone_adr[12]" SITE "X";
+LOCATE COMP "wishbone_adr[13]" SITE "X";
+LOCATE COMP "wishbone_adr[14]" SITE "X";
+LOCATE COMP "wishbone_adr[15]" SITE "X";
+LOCATE COMP "wishbone_adr[16]" SITE "X";
+LOCATE COMP "wishbone_adr[17]" SITE "X";
+LOCATE COMP "wishbone_adr[18]" SITE "X";
+LOCATE COMP "wishbone_adr[19]" SITE "X";
+LOCATE COMP "wishbone_adr[20]" SITE "X";
+LOCATE COMP "wishbone_adr[21]" SITE "X";
+LOCATE COMP "wishbone_adr[22]" SITE "X";
+LOCATE COMP "wishbone_adr[23]" SITE "X";
+LOCATE COMP "wishbone_adr[24]" SITE "X";
+LOCATE COMP "wishbone_adr[25]" SITE "X";
+LOCATE COMP "wishbone_adr[26]" SITE "X";
+LOCATE COMP "wishbone_adr[27]" SITE "X";
+LOCATE COMP "wishbone_adr[28]" SITE "X";
+LOCATE COMP "wishbone_adr[29]" SITE "X";
+LOCATE COMP "wishbone_dat_w[0]" SITE "X";
+LOCATE COMP "wishbone_dat_w[1]" SITE "X";
+LOCATE COMP "wishbone_dat_w[2]" SITE "X";
+LOCATE COMP "wishbone_dat_w[3]" SITE "X";
+LOCATE COMP "wishbone_dat_w[4]" SITE "X";
+LOCATE COMP "wishbone_dat_w[5]" SITE "X";
+LOCATE COMP "wishbone_dat_w[6]" SITE "X";
+LOCATE COMP "wishbone_dat_w[7]" SITE "X";
+LOCATE COMP "wishbone_dat_w[8]" SITE "X";
+LOCATE COMP "wishbone_dat_w[9]" SITE "X";
+LOCATE COMP "wishbone_dat_w[10]" SITE "X";
+LOCATE COMP "wishbone_dat_w[11]" SITE "X";
+LOCATE COMP "wishbone_dat_w[12]" SITE "X";
+LOCATE COMP "wishbone_dat_w[13]" SITE "X";
+LOCATE COMP "wishbone_dat_w[14]" SITE "X";
+LOCATE COMP "wishbone_dat_w[15]" SITE "X";
+LOCATE COMP "wishbone_dat_w[16]" SITE "X";
+LOCATE COMP "wishbone_dat_w[17]" SITE "X";
+LOCATE COMP "wishbone_dat_w[18]" SITE "X";
+LOCATE COMP "wishbone_dat_w[19]" SITE "X";
+LOCATE COMP "wishbone_dat_w[20]" SITE "X";
+LOCATE COMP "wishbone_dat_w[21]" SITE "X";
+LOCATE COMP "wishbone_dat_w[22]" SITE "X";
+LOCATE COMP "wishbone_dat_w[23]" SITE "X";
+LOCATE COMP "wishbone_dat_w[24]" SITE "X";
+LOCATE COMP "wishbone_dat_w[25]" SITE "X";
+LOCATE COMP "wishbone_dat_w[26]" SITE "X";
+LOCATE COMP "wishbone_dat_w[27]" SITE "X";
+LOCATE COMP "wishbone_dat_w[28]" SITE "X";
+LOCATE COMP "wishbone_dat_w[29]" SITE "X";
+LOCATE COMP "wishbone_dat_w[30]" SITE "X";
+LOCATE COMP "wishbone_dat_w[31]" SITE "X";
+LOCATE COMP "wishbone_dat_r[0]" SITE "X";
+LOCATE COMP "wishbone_dat_r[1]" SITE "X";
+LOCATE COMP "wishbone_dat_r[2]" SITE "X";
+LOCATE COMP "wishbone_dat_r[3]" SITE "X";
+LOCATE COMP "wishbone_dat_r[4]" SITE "X";
+LOCATE COMP "wishbone_dat_r[5]" SITE "X";
+LOCATE COMP "wishbone_dat_r[6]" SITE "X";
+LOCATE COMP "wishbone_dat_r[7]" SITE "X";
+LOCATE COMP "wishbone_dat_r[8]" SITE "X";
+LOCATE COMP "wishbone_dat_r[9]" SITE "X";
+LOCATE COMP "wishbone_dat_r[10]" SITE "X";
+LOCATE COMP "wishbone_dat_r[11]" SITE "X";
+LOCATE COMP "wishbone_dat_r[12]" SITE "X";
+LOCATE COMP "wishbone_dat_r[13]" SITE "X";
+LOCATE COMP "wishbone_dat_r[14]" SITE "X";
+LOCATE COMP "wishbone_dat_r[15]" SITE "X";
+LOCATE COMP "wishbone_dat_r[16]" SITE "X";
+LOCATE COMP "wishbone_dat_r[17]" SITE "X";
+LOCATE COMP "wishbone_dat_r[18]" SITE "X";
+LOCATE COMP "wishbone_dat_r[19]" SITE "X";
+LOCATE COMP "wishbone_dat_r[20]" SITE "X";
+LOCATE COMP "wishbone_dat_r[21]" SITE "X";
+LOCATE COMP "wishbone_dat_r[22]" SITE "X";
+LOCATE COMP "wishbone_dat_r[23]" SITE "X";
+LOCATE COMP "wishbone_dat_r[24]" SITE "X";
+LOCATE COMP "wishbone_dat_r[25]" SITE "X";
+LOCATE COMP "wishbone_dat_r[26]" SITE "X";
+LOCATE COMP "wishbone_dat_r[27]" SITE "X";
+LOCATE COMP "wishbone_dat_r[28]" SITE "X";
+LOCATE COMP "wishbone_dat_r[29]" SITE "X";
+LOCATE COMP "wishbone_dat_r[30]" SITE "X";
+LOCATE COMP "wishbone_dat_r[31]" SITE "X";
+LOCATE COMP "wishbone_sel[0]" SITE "X";
+LOCATE COMP "wishbone_sel[1]" SITE "X";
+LOCATE COMP "wishbone_sel[2]" SITE "X";
+LOCATE COMP "wishbone_sel[3]" SITE "X";
+LOCATE COMP "wishbone_cyc" SITE "X";
+LOCATE COMP "wishbone_stb" SITE "X";
+LOCATE COMP "wishbone_ack" SITE "X";
+LOCATE COMP "wishbone_we" SITE "X";
+LOCATE COMP "wishbone_cti[0]" SITE "X";
+LOCATE COMP "wishbone_cti[1]" SITE "X";
+LOCATE COMP "wishbone_cti[2]" SITE "X";
+LOCATE COMP "wishbone_bte[0]" SITE "X";
+LOCATE COMP "wishbone_bte[1]" SITE "X";
+LOCATE COMP "wishbone_err" SITE "X";
+LOCATE COMP "interrupt" SITE "X";
+FREQUENCY PORT "eth_rx_clk" 125.0 MHz;
+
+FREQUENCY PORT "eth_tx_clk" 125.0 MHz;

gateware/liteeth/gateware/liteeth_core.ys

@@ -0,0 +1,8 @@
+verilog_defaults -push
+verilog_defaults -add -defer
+read_verilog /home/david/ARVP/sonar_fpga/gateware/liteeth/gateware/liteeth_core.v
+verilog_defaults -pop
+attrmap -tocase keep -imap keep="true" keep=1 -imap keep="false" keep=0 -remove keep=0
+
+synth_ecp5  -top liteeth_core
+write_json  liteeth_core.json

gateware/liteeth/software/include/generated/csr.h

@@ -0,0 +1,409 @@
+//--------------------------------------------------------------------------------
+// Auto-generated by LiteX (8159b5ca) on 2023-02-07 21:33:18
+//--------------------------------------------------------------------------------
+#include <generated/soc.h>
+#ifndef __GENERATED_CSR_H
+#define __GENERATED_CSR_H
+#include <stdint.h>
+#include <system.h>
+#ifndef CSR_ACCESSORS_DEFINED
+#include <hw/common.h>
+#endif /* ! CSR_ACCESSORS_DEFINED */
+#ifndef CSR_BASE
+#define CSR_BASE 0x0L
+#endif
+
+/* ctrl */
+#define CSR_CTRL_BASE (CSR_BASE + 0x0L)
+#define CSR_CTRL_RESET_ADDR (CSR_BASE + 0x0L)
+#define CSR_CTRL_RESET_SIZE 1
+static inline uint32_t ctrl_reset_read(void) {
+	return csr_read_simple((CSR_BASE + 0x0L));
+}
+static inline void ctrl_reset_write(uint32_t v) {
+	csr_write_simple(v, (CSR_BASE + 0x0L));
+}
+#define CSR_CTRL_RESET_SOC_RST_OFFSET 0
+#define CSR_CTRL_RESET_SOC_RST_SIZE 1
+static inline uint32_t ctrl_reset_soc_rst_extract(uint32_t oldword) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return ( (oldword >> 0) & mask );
+}
+static inline uint32_t ctrl_reset_soc_rst_read(void) {
+	uint32_t word = ctrl_reset_read();
+	return ctrl_reset_soc_rst_extract(word);
+}
+static inline uint32_t ctrl_reset_soc_rst_replace(uint32_t oldword, uint32_t plain_value) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ;
+}
+static inline void ctrl_reset_soc_rst_write(uint32_t plain_value) {
+	uint32_t oldword = ctrl_reset_read();
+	uint32_t newword = ctrl_reset_soc_rst_replace(oldword, plain_value);
+	ctrl_reset_write(newword);
+}
+#define CSR_CTRL_RESET_CPU_RST_OFFSET 1
+#define CSR_CTRL_RESET_CPU_RST_SIZE 1
+static inline uint32_t ctrl_reset_cpu_rst_extract(uint32_t oldword) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return ( (oldword >> 1) & mask );
+}
+static inline uint32_t ctrl_reset_cpu_rst_read(void) {
+	uint32_t word = ctrl_reset_read();
+	return ctrl_reset_cpu_rst_extract(word);
+}
+static inline uint32_t ctrl_reset_cpu_rst_replace(uint32_t oldword, uint32_t plain_value) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return (oldword & (~(mask << 1))) | (mask & plain_value)<< 1 ;
+}
+static inline void ctrl_reset_cpu_rst_write(uint32_t plain_value) {
+	uint32_t oldword = ctrl_reset_read();
+	uint32_t newword = ctrl_reset_cpu_rst_replace(oldword, plain_value);
+	ctrl_reset_write(newword);
+}
+#define CSR_CTRL_SCRATCH_ADDR (CSR_BASE + 0x4L)
+#define CSR_CTRL_SCRATCH_SIZE 1
+static inline uint32_t ctrl_scratch_read(void) {
+	return csr_read_simple((CSR_BASE + 0x4L));
+}
+static inline void ctrl_scratch_write(uint32_t v) {
+	csr_write_simple(v, (CSR_BASE + 0x4L));
+}
+#define CSR_CTRL_BUS_ERRORS_ADDR (CSR_BASE + 0x8L)
+#define CSR_CTRL_BUS_ERRORS_SIZE 1
+static inline uint32_t ctrl_bus_errors_read(void) {
+	return csr_read_simple((CSR_BASE + 0x8L));
+}
+
+/* ethmac */
+#define CSR_ETHMAC_BASE (CSR_BASE + 0x800L)
+#define CSR_ETHMAC_SRAM_WRITER_SLOT_ADDR (CSR_BASE + 0x800L)
+#define CSR_ETHMAC_SRAM_WRITER_SLOT_SIZE 1
+static inline uint32_t ethmac_sram_writer_slot_read(void) {
+	return csr_read_simple((CSR_BASE + 0x800L));
+}
+#define CSR_ETHMAC_SRAM_WRITER_LENGTH_ADDR (CSR_BASE + 0x804L)
+#define CSR_ETHMAC_SRAM_WRITER_LENGTH_SIZE 1
+static inline uint32_t ethmac_sram_writer_length_read(void) {
+	return csr_read_simple((CSR_BASE + 0x804L));
+}
+#define CSR_ETHMAC_SRAM_WRITER_ERRORS_ADDR (CSR_BASE + 0x808L)
+#define CSR_ETHMAC_SRAM_WRITER_ERRORS_SIZE 1
+static inline uint32_t ethmac_sram_writer_errors_read(void) {
+	return csr_read_simple((CSR_BASE + 0x808L));
+}
+#define CSR_ETHMAC_SRAM_WRITER_EV_STATUS_ADDR (CSR_BASE + 0x80cL)
+#define CSR_ETHMAC_SRAM_WRITER_EV_STATUS_SIZE 1
+static inline uint32_t ethmac_sram_writer_ev_status_read(void) {
+	return csr_read_simple((CSR_BASE + 0x80cL));
+}
+#define CSR_ETHMAC_SRAM_WRITER_EV_STATUS_AVAILABLE_OFFSET 0
+#define CSR_ETHMAC_SRAM_WRITER_EV_STATUS_AVAILABLE_SIZE 1
+static inline uint32_t ethmac_sram_writer_ev_status_available_extract(uint32_t oldword) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return ( (oldword >> 0) & mask );
+}
+static inline uint32_t ethmac_sram_writer_ev_status_available_read(void) {
+	uint32_t word = ethmac_sram_writer_ev_status_read();
+	return ethmac_sram_writer_ev_status_available_extract(word);
+}
+#define CSR_ETHMAC_SRAM_WRITER_EV_PENDING_ADDR (CSR_BASE + 0x810L)
+#define CSR_ETHMAC_SRAM_WRITER_EV_PENDING_SIZE 1
+static inline uint32_t ethmac_sram_writer_ev_pending_read(void) {
+	return csr_read_simple((CSR_BASE + 0x810L));
+}
+static inline void ethmac_sram_writer_ev_pending_write(uint32_t v) {
+	csr_write_simple(v, (CSR_BASE + 0x810L));
+}
+#define CSR_ETHMAC_SRAM_WRITER_EV_PENDING_AVAILABLE_OFFSET 0
+#define CSR_ETHMAC_SRAM_WRITER_EV_PENDING_AVAILABLE_SIZE 1
+static inline uint32_t ethmac_sram_writer_ev_pending_available_extract(uint32_t oldword) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return ( (oldword >> 0) & mask );
+}
+static inline uint32_t ethmac_sram_writer_ev_pending_available_read(void) {
+	uint32_t word = ethmac_sram_writer_ev_pending_read();
+	return ethmac_sram_writer_ev_pending_available_extract(word);
+}
+static inline uint32_t ethmac_sram_writer_ev_pending_available_replace(uint32_t oldword, uint32_t plain_value) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ;
+}
+static inline void ethmac_sram_writer_ev_pending_available_write(uint32_t plain_value) {
+	uint32_t oldword = ethmac_sram_writer_ev_pending_read();
+	uint32_t newword = ethmac_sram_writer_ev_pending_available_replace(oldword, plain_value);
+	ethmac_sram_writer_ev_pending_write(newword);
+}
+#define CSR_ETHMAC_SRAM_WRITER_EV_ENABLE_ADDR (CSR_BASE + 0x814L)
+#define CSR_ETHMAC_SRAM_WRITER_EV_ENABLE_SIZE 1
+static inline uint32_t ethmac_sram_writer_ev_enable_read(void) {
+	return csr_read_simple((CSR_BASE + 0x814L));
+}
+static inline void ethmac_sram_writer_ev_enable_write(uint32_t v) {
+	csr_write_simple(v, (CSR_BASE + 0x814L));
+}
+#define CSR_ETHMAC_SRAM_WRITER_EV_ENABLE_AVAILABLE_OFFSET 0
+#define CSR_ETHMAC_SRAM_WRITER_EV_ENABLE_AVAILABLE_SIZE 1
+static inline uint32_t ethmac_sram_writer_ev_enable_available_extract(uint32_t oldword) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return ( (oldword >> 0) & mask );
+}
+static inline uint32_t ethmac_sram_writer_ev_enable_available_read(void) {
+	uint32_t word = ethmac_sram_writer_ev_enable_read();
+	return ethmac_sram_writer_ev_enable_available_extract(word);
+}
+static inline uint32_t ethmac_sram_writer_ev_enable_available_replace(uint32_t oldword, uint32_t plain_value) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ;
+}
+static inline void ethmac_sram_writer_ev_enable_available_write(uint32_t plain_value) {
+	uint32_t oldword = ethmac_sram_writer_ev_enable_read();
+	uint32_t newword = ethmac_sram_writer_ev_enable_available_replace(oldword, plain_value);
+	ethmac_sram_writer_ev_enable_write(newword);
+}
+#define CSR_ETHMAC_SRAM_READER_START_ADDR (CSR_BASE + 0x818L)
+#define CSR_ETHMAC_SRAM_READER_START_SIZE 1
+static inline uint32_t ethmac_sram_reader_start_read(void) {
+	return csr_read_simple((CSR_BASE + 0x818L));
+}
+static inline void ethmac_sram_reader_start_write(uint32_t v) {
+	csr_write_simple(v, (CSR_BASE + 0x818L));
+}
+#define CSR_ETHMAC_SRAM_READER_READY_ADDR (CSR_BASE + 0x81cL)
+#define CSR_ETHMAC_SRAM_READER_READY_SIZE 1
+static inline uint32_t ethmac_sram_reader_ready_read(void) {
+	return csr_read_simple((CSR_BASE + 0x81cL));
+}
+#define CSR_ETHMAC_SRAM_READER_LEVEL_ADDR (CSR_BASE + 0x820L)
+#define CSR_ETHMAC_SRAM_READER_LEVEL_SIZE 1
+static inline uint32_t ethmac_sram_reader_level_read(void) {
+	return csr_read_simple((CSR_BASE + 0x820L));
+}
+#define CSR_ETHMAC_SRAM_READER_SLOT_ADDR (CSR_BASE + 0x824L)
+#define CSR_ETHMAC_SRAM_READER_SLOT_SIZE 1
+static inline uint32_t ethmac_sram_reader_slot_read(void) {
+	return csr_read_simple((CSR_BASE + 0x824L));
+}
+static inline void ethmac_sram_reader_slot_write(uint32_t v) {
+	csr_write_simple(v, (CSR_BASE + 0x824L));
+}
+#define CSR_ETHMAC_SRAM_READER_LENGTH_ADDR (CSR_BASE + 0x828L)
+#define CSR_ETHMAC_SRAM_READER_LENGTH_SIZE 1
+static inline uint32_t ethmac_sram_reader_length_read(void) {
+	return csr_read_simple((CSR_BASE + 0x828L));
+}
+static inline void ethmac_sram_reader_length_write(uint32_t v) {
+	csr_write_simple(v, (CSR_BASE + 0x828L));
+}
+#define CSR_ETHMAC_SRAM_READER_EV_STATUS_ADDR (CSR_BASE + 0x82cL)
+#define CSR_ETHMAC_SRAM_READER_EV_STATUS_SIZE 1
+static inline uint32_t ethmac_sram_reader_ev_status_read(void) {
+	return csr_read_simple((CSR_BASE + 0x82cL));
+}
+#define CSR_ETHMAC_SRAM_READER_EV_STATUS_EVENT0_OFFSET 0
+#define CSR_ETHMAC_SRAM_READER_EV_STATUS_EVENT0_SIZE 1
+static inline uint32_t ethmac_sram_reader_ev_status_event0_extract(uint32_t oldword) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return ( (oldword >> 0) & mask );
+}
+static inline uint32_t ethmac_sram_reader_ev_status_event0_read(void) {
+	uint32_t word = ethmac_sram_reader_ev_status_read();
+	return ethmac_sram_reader_ev_status_event0_extract(word);
+}
+#define CSR_ETHMAC_SRAM_READER_EV_PENDING_ADDR (CSR_BASE + 0x830L)
+#define CSR_ETHMAC_SRAM_READER_EV_PENDING_SIZE 1
+static inline uint32_t ethmac_sram_reader_ev_pending_read(void) {
+	return csr_read_simple((CSR_BASE + 0x830L));
+}
+static inline void ethmac_sram_reader_ev_pending_write(uint32_t v) {
+	csr_write_simple(v, (CSR_BASE + 0x830L));
+}
+#define CSR_ETHMAC_SRAM_READER_EV_PENDING_EVENT0_OFFSET 0
+#define CSR_ETHMAC_SRAM_READER_EV_PENDING_EVENT0_SIZE 1
+static inline uint32_t ethmac_sram_reader_ev_pending_event0_extract(uint32_t oldword) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return ( (oldword >> 0) & mask );
+}
+static inline uint32_t ethmac_sram_reader_ev_pending_event0_read(void) {
+	uint32_t word = ethmac_sram_reader_ev_pending_read();
+	return ethmac_sram_reader_ev_pending_event0_extract(word);
+}
+static inline uint32_t ethmac_sram_reader_ev_pending_event0_replace(uint32_t oldword, uint32_t plain_value) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ;
+}
+static inline void ethmac_sram_reader_ev_pending_event0_write(uint32_t plain_value) {
+	uint32_t oldword = ethmac_sram_reader_ev_pending_read();
+	uint32_t newword = ethmac_sram_reader_ev_pending_event0_replace(oldword, plain_value);
+	ethmac_sram_reader_ev_pending_write(newword);
+}
+#define CSR_ETHMAC_SRAM_READER_EV_ENABLE_ADDR (CSR_BASE + 0x834L)
+#define CSR_ETHMAC_SRAM_READER_EV_ENABLE_SIZE 1
+static inline uint32_t ethmac_sram_reader_ev_enable_read(void) {
+	return csr_read_simple((CSR_BASE + 0x834L));
+}
+static inline void ethmac_sram_reader_ev_enable_write(uint32_t v) {
+	csr_write_simple(v, (CSR_BASE + 0x834L));
+}
+#define CSR_ETHMAC_SRAM_READER_EV_ENABLE_EVENT0_OFFSET 0
+#define CSR_ETHMAC_SRAM_READER_EV_ENABLE_EVENT0_SIZE 1
+static inline uint32_t ethmac_sram_reader_ev_enable_event0_extract(uint32_t oldword) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return ( (oldword >> 0) & mask );
+}
+static inline uint32_t ethmac_sram_reader_ev_enable_event0_read(void) {
+	uint32_t word = ethmac_sram_reader_ev_enable_read();
+	return ethmac_sram_reader_ev_enable_event0_extract(word);
+}
+static inline uint32_t ethmac_sram_reader_ev_enable_event0_replace(uint32_t oldword, uint32_t plain_value) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ;
+}
+static inline void ethmac_sram_reader_ev_enable_event0_write(uint32_t plain_value) {
+	uint32_t oldword = ethmac_sram_reader_ev_enable_read();
+	uint32_t newword = ethmac_sram_reader_ev_enable_event0_replace(oldword, plain_value);
+	ethmac_sram_reader_ev_enable_write(newword);
+}
+#define CSR_ETHMAC_PREAMBLE_CRC_ADDR (CSR_BASE + 0x838L)
+#define CSR_ETHMAC_PREAMBLE_CRC_SIZE 1
+static inline uint32_t ethmac_preamble_crc_read(void) {
+	return csr_read_simple((CSR_BASE + 0x838L));
+}
+#define CSR_ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS_ADDR (CSR_BASE + 0x83cL)
+#define CSR_ETHMAC_RX_DATAPATH_PREAMBLE_ERRORS_SIZE 1
+static inline uint32_t ethmac_rx_datapath_preamble_errors_read(void) {
+	return csr_read_simple((CSR_BASE + 0x83cL));
+}
+#define CSR_ETHMAC_RX_DATAPATH_CRC_ERRORS_ADDR (CSR_BASE + 0x840L)
+#define CSR_ETHMAC_RX_DATAPATH_CRC_ERRORS_SIZE 1
+static inline uint32_t ethmac_rx_datapath_crc_errors_read(void) {
+	return csr_read_simple((CSR_BASE + 0x840L));
+}
+
+/* ethphy */
+#define CSR_ETHPHY_BASE (CSR_BASE + 0x1000L)
+#define CSR_ETHPHY_CRG_RESET_ADDR (CSR_BASE + 0x1000L)
+#define CSR_ETHPHY_CRG_RESET_SIZE 1
+static inline uint32_t ethphy_crg_reset_read(void) {
+	return csr_read_simple((CSR_BASE + 0x1000L));
+}
+static inline void ethphy_crg_reset_write(uint32_t v) {
+	csr_write_simple(v, (CSR_BASE + 0x1000L));
+}
+#define CSR_ETHPHY_RX_INBAND_STATUS_ADDR (CSR_BASE + 0x1004L)
+#define CSR_ETHPHY_RX_INBAND_STATUS_SIZE 1
+static inline uint32_t ethphy_rx_inband_status_read(void) {
+	return csr_read_simple((CSR_BASE + 0x1004L));
+}
+#define CSR_ETHPHY_RX_INBAND_STATUS_LINK_STATUS_OFFSET 0
+#define CSR_ETHPHY_RX_INBAND_STATUS_LINK_STATUS_SIZE 1
+static inline uint32_t ethphy_rx_inband_status_link_status_extract(uint32_t oldword) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return ( (oldword >> 0) & mask );
+}
+static inline uint32_t ethphy_rx_inband_status_link_status_read(void) {
+	uint32_t word = ethphy_rx_inband_status_read();
+	return ethphy_rx_inband_status_link_status_extract(word);
+}
+#define CSR_ETHPHY_RX_INBAND_STATUS_CLOCK_SPEED_OFFSET 1
+#define CSR_ETHPHY_RX_INBAND_STATUS_CLOCK_SPEED_SIZE 1
+static inline uint32_t ethphy_rx_inband_status_clock_speed_extract(uint32_t oldword) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return ( (oldword >> 1) & mask );
+}
+static inline uint32_t ethphy_rx_inband_status_clock_speed_read(void) {
+	uint32_t word = ethphy_rx_inband_status_read();
+	return ethphy_rx_inband_status_clock_speed_extract(word);
+}
+#define CSR_ETHPHY_RX_INBAND_STATUS_DUPLEX_STATUS_OFFSET 2
+#define CSR_ETHPHY_RX_INBAND_STATUS_DUPLEX_STATUS_SIZE 1
+static inline uint32_t ethphy_rx_inband_status_duplex_status_extract(uint32_t oldword) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return ( (oldword >> 2) & mask );
+}
+static inline uint32_t ethphy_rx_inband_status_duplex_status_read(void) {
+	uint32_t word = ethphy_rx_inband_status_read();
+	return ethphy_rx_inband_status_duplex_status_extract(word);
+}
+#define CSR_ETHPHY_MDIO_W_ADDR (CSR_BASE + 0x1008L)
+#define CSR_ETHPHY_MDIO_W_SIZE 1
+static inline uint32_t ethphy_mdio_w_read(void) {
+	return csr_read_simple((CSR_BASE + 0x1008L));
+}
+static inline void ethphy_mdio_w_write(uint32_t v) {
+	csr_write_simple(v, (CSR_BASE + 0x1008L));
+}
+#define CSR_ETHPHY_MDIO_W_MDC_OFFSET 0
+#define CSR_ETHPHY_MDIO_W_MDC_SIZE 1
+static inline uint32_t ethphy_mdio_w_mdc_extract(uint32_t oldword) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return ( (oldword >> 0) & mask );
+}
+static inline uint32_t ethphy_mdio_w_mdc_read(void) {
+	uint32_t word = ethphy_mdio_w_read();
+	return ethphy_mdio_w_mdc_extract(word);
+}
+static inline uint32_t ethphy_mdio_w_mdc_replace(uint32_t oldword, uint32_t plain_value) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ;
+}
+static inline void ethphy_mdio_w_mdc_write(uint32_t plain_value) {
+	uint32_t oldword = ethphy_mdio_w_read();
+	uint32_t newword = ethphy_mdio_w_mdc_replace(oldword, plain_value);
+	ethphy_mdio_w_write(newword);
+}
+#define CSR_ETHPHY_MDIO_W_OE_OFFSET 1
+#define CSR_ETHPHY_MDIO_W_OE_SIZE 1
+static inline uint32_t ethphy_mdio_w_oe_extract(uint32_t oldword) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return ( (oldword >> 1) & mask );
+}
+static inline uint32_t ethphy_mdio_w_oe_read(void) {
+	uint32_t word = ethphy_mdio_w_read();
+	return ethphy_mdio_w_oe_extract(word);
+}
+static inline uint32_t ethphy_mdio_w_oe_replace(uint32_t oldword, uint32_t plain_value) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return (oldword & (~(mask << 1))) | (mask & plain_value)<< 1 ;
+}
+static inline void ethphy_mdio_w_oe_write(uint32_t plain_value) {
+	uint32_t oldword = ethphy_mdio_w_read();
+	uint32_t newword = ethphy_mdio_w_oe_replace(oldword, plain_value);
+	ethphy_mdio_w_write(newword);
+}
+#define CSR_ETHPHY_MDIO_W_W_OFFSET 2
+#define CSR_ETHPHY_MDIO_W_W_SIZE 1
+static inline uint32_t ethphy_mdio_w_w_extract(uint32_t oldword) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return ( (oldword >> 2) & mask );
+}
+static inline uint32_t ethphy_mdio_w_w_read(void) {
+	uint32_t word = ethphy_mdio_w_read();
+	return ethphy_mdio_w_w_extract(word);
+}
+static inline uint32_t ethphy_mdio_w_w_replace(uint32_t oldword, uint32_t plain_value) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return (oldword & (~(mask << 2))) | (mask & plain_value)<< 2 ;
+}
+static inline void ethphy_mdio_w_w_write(uint32_t plain_value) {
+	uint32_t oldword = ethphy_mdio_w_read();
+	uint32_t newword = ethphy_mdio_w_w_replace(oldword, plain_value);
+	ethphy_mdio_w_write(newword);
+}
+#define CSR_ETHPHY_MDIO_R_ADDR (CSR_BASE + 0x100cL)
+#define CSR_ETHPHY_MDIO_R_SIZE 1
+static inline uint32_t ethphy_mdio_r_read(void) {
+	return csr_read_simple((CSR_BASE + 0x100cL));
+}
+#define CSR_ETHPHY_MDIO_R_R_OFFSET 0
+#define CSR_ETHPHY_MDIO_R_R_SIZE 1
+static inline uint32_t ethphy_mdio_r_r_extract(uint32_t oldword) {
+	uint32_t mask = ((uint32_t)(1 << 1)-1);
+	return ( (oldword >> 0) & mask );
+}
+static inline uint32_t ethphy_mdio_r_r_read(void) {
+	uint32_t word = ethphy_mdio_r_read();
+	return ethphy_mdio_r_r_extract(word);
+}
+
+#endif

gateware/liteeth/software/include/generated/git.h

@@ -0,0 +1,8 @@
+//--------------------------------------------------------------------------------
+// Auto-generated by LiteX (8159b5ca) on 2023-02-07 21:33:18
+//--------------------------------------------------------------------------------
+#ifndef __GENERATED_GIT_H
+#define __GENERATED_GIT_H
+
+#define LITEX_GIT_SHA1 "8159b5ca"
+#endif

gateware/liteeth/software/include/generated/mem.h

@@ -0,0 +1,20 @@
+//--------------------------------------------------------------------------------
+// Auto-generated by LiteX (8159b5ca) on 2023-02-07 21:33:18
+//--------------------------------------------------------------------------------
+#ifndef __GENERATED_MEM_H
+#define __GENERATED_MEM_H
+
+#ifndef ETHMAC_BASE
+#define ETHMAC_BASE 0x00020000L
+#define ETHMAC_SIZE 0x00002000
+#endif
+
+#ifndef CSR_BASE
+#define CSR_BASE 0x00000000L
+#define CSR_SIZE 0x00010000
+#endif
+
+#ifndef MEM_REGIONS
+#define MEM_REGIONS "ETHMAC  0x00020000 0x2000 \nCSR     0x00000000 0x10000 "
+#endif
+#endif

gateware/liteeth/software/include/generated/soc.h

@@ -0,0 +1,56 @@
+//--------------------------------------------------------------------------------
+// Auto-generated by LiteX (8159b5ca) on 2023-02-07 21:33:18
+//--------------------------------------------------------------------------------
+#ifndef __GENERATED_SOC_H
+#define __GENERATED_SOC_H
+#define CONFIG_CLOCK_FREQUENCY 10000000
+#define CONFIG_CPU_TYPE_NONE
+#define CONFIG_CPU_VARIANT_STANDARD
+#define CONFIG_CPU_HUMAN_NAME "Unknown"
+#define CONFIG_CSR_DATA_WIDTH 32
+#define CONFIG_CSR_ALIGNMENT 32
+#define CONFIG_BUS_STANDARD "WISHBONE"
+#define CONFIG_BUS_DATA_WIDTH 32
+#define CONFIG_BUS_ADDRESS_WIDTH 32
+#define CONFIG_BUS_BURSTING 0
+#define ETHMAC_RX_SLOTS 2
+#define ETHMAC_TX_SLOTS 2
+#define ETHMAC_SLOT_SIZE 2048
+
+#ifndef __ASSEMBLER__
+static inline int config_clock_frequency_read(void) {
+	return 10000000;
+}
+static inline const char * config_cpu_human_name_read(void) {
+	return "Unknown";
+}
+static inline int config_csr_data_width_read(void) {
+	return 32;
+}
+static inline int config_csr_alignment_read(void) {
+	return 32;
+}
+static inline const char * config_bus_standard_read(void) {
+	return "WISHBONE";
+}
+static inline int config_bus_data_width_read(void) {
+	return 32;
+}
+static inline int config_bus_address_width_read(void) {
+	return 32;
+}
+static inline int config_bus_bursting_read(void) {
+	return 0;
+}
+static inline int ethmac_rx_slots_read(void) {
+	return 2;
+}
+static inline int ethmac_tx_slots_read(void) {
+	return 2;
+}
+static inline int ethmac_slot_size_read(void) {
+	return 2048;
+}
+#endif // !__ASSEMBLER__
+
+#endif

gateware/main.py

@@ -16,6 +16,7 @@ import os
 
 from memory import *
 from led import *
+from eth import *
 
 import i2c
 import test_i2c
@@ -103,6 +104,9 @@ class Core(Elaboratable):
 
         m.submodules.uart = uart.UART(10e6)
 
+        # Ethernet
+        m.submodules.eth = LiteEth()
+
         # Counter
         #m.d.sync += self.count.eq(self.count + 1)
         #with m.If(self.count >= 50000000):

gateware/test.gtwk

@@ -0,0 +1,3 @@
+[dumpfile] "/home/david/ARVP/sonar_fpga/gateware/test.vcd"
+[dumpfile_size] 33226
+[treeopen] top.

requirements.txt

@@ -2,3 +2,5 @@ git+https://github.com/amaranth-lang/amaranth
 git+https://github.com/amaranth-lang/amaranth-soc
 git+https://github.com/minerva-cpu/minerva
 git+https://github.com/amaranth-community-unofficial/amlib
+sphinx
+sphinxcontrib-wavedrom